Newer DTC now warns about mismatch between the reg and unit-address.
Most of these cases are due to case not matching, so fix thoses so
everything is lowercase.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove memory node from skeleton dtsi and add device_type
property in every memory node in soc dtsi files
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch add the unit-address component to memory and flash
nodes. According to the DT specification, the unit-address of
a node must match the first address specified in the reg
property of the node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Remove compatible = "flash" from any node that has it as this doesn't
have any well defined meaning right now. Also update any compatible =
"sram" to be "mmio-sram" (as there's a binding in linux for this).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds #address-cell, #size-cell properties to
cpus container node and device_type, reg properties to
cpu node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Now that we can utilize label in the device tree we can convert to
getting the device name for the TI Stellaris UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted Stellaris UART driver over to utilize device tree generated
defines. Added a yaml description for the uart, and converted over the
ti_lm3s6965 SoC & qemu_cortex_m3 board port over to utilize it.
Change-Id: Ie20844eb63d2c68eb59ad4160f7f5b5a35e2943b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a simple device tree for the TI lm3s6965 SoC and QEMU
Cortex-M3 board port. We get flash and memory base addresses and sizes
from the device tree as well as the ARM NVIC number of priority bits.
Change-Id: I4452b5543de7be55518997e54837ccbfd4f121df
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Kumar Gala