The ARC timer is a MHz-scale cycle counter and works very well with
the new 10 kHz default tick rate. Remove the settings for ARC
hardware.
Note that the nsim board definitions are left at 100 Hz. That is a
software emulation environment that (like qemu) exposes the host clock
as "real" time and thus is subject to clock jitter due to host
scheduling.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The original em7d, em9d and em11d are different configurations of
em_starterkit. They have the same peripherals, e.g. uart, spi, gpio
, ddr. The differences of them are in arc core configurations, interrupt
number assignment.
So em7d, em9d and em11d can be viewed in the same SoC family or SoC
series.
Referring other arch's implementation, this commit merges em7d, em9d
and em11d into the same SoC, named snps_emsk. This will eliminate
unnecessary duplication and make it easier for future maintainment.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Change TICKS_PER_SEC from 1000 to 100
* em_starterkit is a FPGA board with cores running at max 30 Mhz.
1000 ticks per second is a little heavy for it.
* the tests/kernel/common requires 200 ticks per second at most,
or the testcase will stall.
disable the generation of bin file.
* there is no flash in em_starterkit
* there is huge gap between ICCM and DCCM which will cause the bin
file too large, alomst 2GB
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
As em7d is supported, all configurations of em_starter_kit version 2.3
are supported. Update all the defconfig to version 2.3.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Andy Ross