Commit Graph

295 Commits

Author SHA1 Message Date
Kumar Gala 762eadc15d drivers: gpio: dw: rework init to use DT_INST_FOREACH_STATUS_OKAY
Use DT_INST_FOREACH_STATUS_OKAY to reduce duplicated code for each
instance.

We make interrupts optional since they aren't always available.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-14 10:31:42 +02:00
Kumar Gala 8a97bbd1f5 drivers: gpio: dw: determine instances from devicetree
Remove Kconfig symbols that determine which instances and just use
the number of enabled instance in the devicetree to determine which
instances to build.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-14 10:31:42 +02:00
Pieter De Gendt e381170282 uart_pipe: Remove obsolete UART_PIPE_ON_DEV_NAME Kconfig
The UART pipe device is selected with devicetree chosen zephyr,uart-pipe

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-07-07 09:59:49 +02:00
Evgeniy Paltsev c9f23499ff boards: ARC: nsim: simplify runner setup & pass MP_NUM_CPUS unconditionally
Do not check for exact SoC to pass '--cores=${CONFIG_MP_NUM_CPUS}'
options to runners an pass it unconditionally instead.

That preventis from issues when adding new SoC/board.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-06-16 10:48:48 -04:00
Gerard Marull-Paretas 4c8a8149de dts: add reg-shift property to all ns16550 devices
The ns16550 flags reg-shift property as optional. In case it is not
supplied, the ns16550 driver relies on a value defined in <soc.h>, or,
by default it takes 4 (shift by 2).

This patch adds the property to all ns16550 nodes, with the following
values:

- 2 if SoC did not have any custom value defined by
  UART_REG_ADDR_INTERVAL (corresponds to 1 << 2 = 4)
- If SoC defined DEFAULT_REG_INTERVAL (snps_arc_iot/it8xxx2), use such
  value (4=2, 2=1, 1=0).

These changes will allow simplifying the ns16550 driver.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-15 16:59:02 -05:00
Stephanos Ioannidis 2598f0ed3c doc: toolchains: Add Zephyr SDK documentation
This commit adds a dedicated page for the Zephyr SDK under the
'Toolchains' sub-category under 'Developing with Zephyr'.

The content of this page is based on the Zephyr SDK installation
instruction from the 'Getting Started Guide'.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-06-01 15:26:48 +02:00
Fabio Baltieri e24314f10f include: add more missing zephyr/ prefixes
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-05-27 15:20:27 -07:00
Evgeniy Paltsev f81b3e03ac ARC: boards: HSDK: ged rid of pinmux usage
Pinmux is deprecated (see #39740) so let's get rid of
it's usage for HSDK board.

As we call pinmux only once at init phase we simply do
register setup in platform code instead of pinmux.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-18 17:20:26 +02:00
Evgeniy Paltsev 729a38d72b ARC: boards: increase timeouts for nsim_hs5x_smp platform
nSIM SMP simulation is s bit slower than single-core one, so
let's increase timeouts for nsim_hs5x_smp platforms as we have for
nsim_hs_smp and nsim_hs6x_smp

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-05-13 08:41:18 -07:00
Evgeniy Paltsev 63e83664eb ARC: boards: nsim: hs5x/hs6x: setup apertures to be runnable on HAPS
Setup peripheral and NOC apertures to make hs5x and hs6x configurations
runnable on real HW (HAPS).

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-13 10:14:10 -05:00
Evgeniy Paltsev 6014319d35 ARC: boards: mdb_hs6x_smp correct gfrc version in nsim args
Use correct gfrc version in nsim args for mdb_hs6x_smp board.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev bb6c89bef8 ARC: boards: allow MWDT toolchain for nsim_hs6x and nsim_hs6x_smp
Allow MWDT toolchain and add corresponding compiler options
for nsim_hs6x and nsim_hs6x_smp.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev d5038c49ba ARC: boards: add nsim_hs5x and nsim_hs5x_smp boards
Add nSIM-based (simulator) boards with
 * nsim_hs5x - single core ARCv3 HS5x 32 bit CPU
 * nsim_hs5x_smp - SMP, two core ARCv3 HS5x 32 bit CPU

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Maureen Helm de514bb7d0 dts: arc: synopsys: Move SoC devicetree includes under a vendor dir
Cleans up SoC devicetree include file locations to follow the convention
of dts/<arch>/<vendor>/

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-05-09 17:54:48 -04:00
Gerard Marull-Paretas db508379c2 boards: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all boards code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:15 +02:00
Evgeniy Paltsev 38c24cd5aa ARC: boards: nSIM: memory layout overhaul
Currently we use incorrect memory layout for SMP boards as
we put data (which need do be accessible from all cores) to
DCCM which is private for each CPU core.

This works for nSIM which doesn't simulate CCMs (as we don't pass
corresponding nSIM options for SMP configurations) however
it won't work if we run that code on real HW (we want to achieve
that nSIM configurations are also runnable on HAPS - FPGA platform).

Let's fix that issue by using DDR instead of CCMs for SMP
configurations (nsim_hs_smp and nsim_hs6x_smp).

While I'm at it - switch UP HS6x configuration (nsim_hs6x)
for DDR usage instead of CCMs - to make that configuration closer
to the HAPS config we have.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-05-06 11:31:21 +02:00
Evgeniy Paltsev 1cfd4fdc24 ARC: boards: hsdk_2cores: allow mwdt toolchain usage
Allow mwdt toolchain usage for 2 cores HSDK configuration
as we have it for 4 cores configuration.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-05 14:23:57 -05:00
Evgeniy Paltsev b102a295af ARC: boards: increase timeouts for nSIM SMP platforms
nSIM SMP simulation is s bit slower than single-core one, so
let's increase timeouts for nSIM SMP platforms.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-05-04 19:01:11 -04:00
Alexey Brodkin 231b37049e boards: qemu_arc: Enable networking via SLIP (serial port)
The simplest way of getting networking to work on really tiny embedded
system is to use an extra serial port as an interface to external world
with help of a SLIP,
see https://en.wikipedia.org/wiki/Serial_Line_Internet_Protocol.

The catch is on a deeply embedded system we most likely won't see
an Ethernet MAC in the system as it might be as large ans as complex
as the CPU itself so there's no point in adding it. Moreover it will
require support in drivers, which are very hardware specific
(not only IP-block specific, but also need to take care of all the quirks
made in this particular instance and platform).

But with SLIP we may use existing serial port of the board which already
has all the needed support and with a platform-agnotic code of SLIP
we may have usable networking on both simulators & real HW boards.

And that's what we do in Zephyr.

Now we teach ARC's QEMU platform to do so as well.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2022-03-24 08:27:40 -04:00
Alexey Brodkin 35f53b8456 ARC: QEMU: Add the second UART support
This makes the second UART of ARC QEMU's "virt" platfrom available
in Zephyr. But please note to get it used corresponding change needs
to be applied to QEMU itself, see:
https://github.com/foss-for-synopsys-dwc-arc-processors/qemu/pull/62

PR for Zephyr's SDK-NG is posted here:
https://github.com/zephyrproject-rtos/sdk-ng/pull/422

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2022-03-24 08:27:40 -04:00
Nazar Kazakov f483b1bc4c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-18 13:24:08 -04:00
Gerard Marull-Paretas 260deccb6e doc: use :kconfig:option: domain role
Kconfig options now belong to the Kconfig domain, therefore, the
:kconfig:option: role needs to be used.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-02 09:28:37 +01:00
Evgeniy Paltsev bb139c1309 ARC: nSIM: fix missing core numbers for mdb-hw runner args
We don't set core numbers for mdb-hw runner for nSIM
board, so it defaults to 1, so mdb-hw runner doesn't work with
SMP boards.

Fix that.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-02-21 21:57:00 -05:00
Maureen Helm 836651b453 drivers: gpio: Refactor drivers to use shared init priority
Refactors all of the on-chip GPIO drivers to use a shared driver class
initialization priority configuration, CONFIG_GPIO_INIT_PRIORITY, to
allow configuring GPIO drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.

Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.

Driver-specific options for off-chip I2C- or SPI-based GPIO drivers are
left intact because they often need to be initialized at a different
priority than on-chip GPIO drivers.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-11-15 14:38:55 -05:00
Filip Kokosinski 94428044e2 cmake: support multiple entries in board.cmake
Currently there is no way to support running a board on multiple
emulation platforms nor to choose a desired emulation platform for the
simulation to be run on. This commit introduces a new
SUPPORTED_EMU_PLATFORMS list, which defines available emulation
platforms for a given board.

Fixes #12375.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2021-11-12 21:33:42 -05:00
Anas Nashif b3abe11104 boards: remove CONFIG_PRINTK from board _defconfig
We should not enable this config in the board, this is an
application config.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-10-18 09:49:45 -04:00
Evgeniy Paltsev 851a8e8c2a ARC: HS6x: nSIM: drop unsupported dcache_uncached_region from mdb.args
HS6x nSIM doesn't have dcache_uncached_region property. Its presence
in configs (mdb.args) causes issues with 2021.06 nSIM, so let's
drop this property as it isn't used anyway.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-01 09:39:40 -04:00
Jingru Wang 86f1bdc069 ARC: add config files for nsim_sem_mpu_stack_guard
Add nsim_sem_mpu_stack_guard.props and
nsim_sem_mpu_stack_guard.args, so we don't
do workarounds in cmake code.

Signed-off-by: Jingru Wang <jingru@synopsys.com>
2021-09-06 22:20:27 -04:00
Evgeniy Paltsev e7436ea862 ARC: qemu_arc_hs6x: enable upstream verification
qemu_arc_hs6x represents the ARCv3 64bit architecture, so
let's enable upstream verification for it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-29 14:24:44 -04:00
Yuguo Zou 7d8d4fd0cd boards: arc: add a nsim_hs_mpuv6 board simulator
We add support of mpu v6 therefore it is needed to have a board to
validate that feature. This commit add a new HS nsim simulator
which supports mpu v6.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2021-08-27 11:45:43 -04:00
Jingru Wang cd87366016 cmake: emu: nsim: Allow all nsim platform use mdb
Currently the default runner of nsim_hs_smp is mdb,
the runner of other nsim platform is nsimdrv, user
can't change the default runner unless he uses
west command(--runner).

With this change cmake will choose runner according
to BOARD_DEBUG_RUNNER or BOARD_FLASH_RUNNER. so if
add -DBOARD_FLASH_RUNNER=mdb-nsim or
-DBOARD_DEBUG_RUNNER=mdb-nsim to cmake command,
the apllication will be run with mdb.

Signed-off-by: Jingru Wang <jingru@synopsys.com>
2021-08-24 07:22:22 -04:00
Evgeniy Paltsev 9e0acf3afa ARC: boards: allow Zephyr toolchain for ARCv3 64bit boards
As 0.13 SDK is available and used in upstream verification by
default we can allow Zephyr toolchain for ARCv3 64bit boards.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-11 11:28:45 -04:00
Evgeniy Paltsev 37a14c7e39 ARC: add nsim_hs6x_smp board with 2 cores ARCv3 HS6x
Add nsim_hs6x_smp simulation board (nSIM based) with
2 cores ARCv3 HS6x CPU.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-07 20:36:23 -04:00
Watson Zeng 36abc60b51 boards: arc: em_starterkit: add creg_gpio driver support
Add creg_gpio driver support for em_starterkit board.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-07-13 09:42:59 -04:00
Watson Zeng 79f5be006e boards: arc: hsdk: add creg_gpio driver support
Add creg_gpio driver support for hsdk board.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-07-13 09:42:59 -04:00
Gerard Marull-Paretas 9dfbdf1997 doc: use kconfig role and directive
Stop using :option: for Kconfig options.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-06-29 10:26:28 -04:00
Anas Nashif d9825257f0 boards: testing: limit default platforms to those we can run
The idea of having default platforms is to prioritize running tests over
just building them. We do not have NSIM in CI and thus we are just
building for those platforms without running the tests, so, we spend
lots of time building on PRs which slows everything down. This is
already done in the daily builds.

We now have Qemu covering ARC. If we can get NSIM into CI, then we
should reconsider enabling some NSIM platforms.

Leaving hs_smp and _sem for coverage, we do not have other platforms
covering those.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-06-08 11:46:21 -04:00
Watson Zeng e397a17059 board: hsdk: add arcmwdt toolchain support in hsdk.yaml
add arcmwdt toolchain support in hsdk.yaml, then we can
use arcmwdt for hsdk board with twister tool.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-05-25 12:55:48 -05:00
Evgeniy Paltsev 0a5137f109 ARC: ARCv3: add qemu HS6x board
Add QEMU board with single core ARCv3 HS6x 64 bit CPU

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev 359f3494a3 ARC: ARCv3: add nsim_hs6x board
Add nSIM-based (simulator) board with single core ARCv3 HS6x 64 bit
CPU.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Watson Zeng e0af111d33 board: qemu_arc: fix cpu frequency to 10Mhz
we have set SYS_CLOCK_HW_CYCLES_PER_SEC to 10000000,
so we need to set cpu.freq_hz=10000000 too.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-05-07 13:15:13 +02:00
Watson Zeng 6a7982ff10 arc: qemu: enable MPU
Enable MPU for arc qemu.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-05-07 13:15:13 +02:00
Kumar Gala b7e908707f boards: arc: hsdk: Enable CY8C95XX if GPIO
The board has an I2C GPIO expander on it.  A number of samples utilize
LEDs on GPIOs for testing purpose so it makes sense to enable the GPIO
expander (CONFIG_GPIO_CY8C95XX) driver when CONFIG_GPIO has been
enabled.  We have to also enable I2C since the expander is connected
over an I2C interface.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-05-06 17:33:58 -04:00
Watson Zeng 9f86020d37 boards: hsdk: add arduino_header and arduino_spi
add arduino_header and arduino_spi for hsdk baord.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-04-28 10:53:52 -04:00
Watson Zeng 6cc84e6f1d boards: hsdk: add cy8c95xx I/O expander, LEDs support
hsdk has an on board cy8c95xx I/O expander, and 4 on
board LEDs use the expander GPIO. Add the I/O expander
and LEDs in hsdk dts, then add documents for them.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-04-28 10:53:52 -04:00
Watson Zeng a79a1e1718 boards: hsdk: dts: remove ili9340 from hsdk dts
remove ili9340 from hsdk dts, as it's not a part of hsdk board,
it's a shield device.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-04-28 10:53:52 -04:00
Eugeniy Paltsev 1050945d2b ARC: boards: nsim: adjust default testing for better coverage
As of today the build-only testing in upstream is enabled for
nsim_em and nsim_em7d_v22 which are very similar from the
compiler POW. The ARC HS, ARC Secure EM and SMP targets miss
any testing.

So adjust default testing for better coverage by enabling
build-only testing for nsim_hs, nsim_sem and nsim_hs_smp and drop
excessive testing for nsim_em7d_v22.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-26 15:32:28 -04:00
Eugeniy Paltsev 8311d27afc ARC: Kconfig: cleanup CPU_ARCEM / CPU_ARCHS options usage
Don't allow user to choose CPU_ARCEM / CPU_ARCHS options
but select them when exact CPU type (i.e. EM4 / EM6 / HS3X/ etc)
is chosen.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-25 07:23:02 -04:00
Anas Nashif 5d6c219210 drivers: device: do not reuse tag name 'device'
Do not reuse tag name (misra rule 5.7).

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-22 19:48:14 -04:00
Watson Zeng fa1d197e06 boards: nsim: add mdb unaligned memory access option
When CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS=y, we also
need to add -Xunaligned option for mdb to enable unaligned
memory access feature for nsim.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-03-15 10:23:30 +01:00