Now when SMP support for ARC is available we may introduce a simulation
platform which might be used for testing & development for SMP setups.
One important note is stand-alone nSIM (as well as its "Free" flavour)
doesn't support SMP simulation so we have to switch to use of nSIM via
proprietary MetaWare debugger [1] and so:
1. We introduce new emulation target "mdb"
2. It's only possible to run that platform for those who
have MetaWare tools installed and valid license.
Though QEMU port for ARC is in work at the moment and once we
open that port and it has SMP support we'll switch to it and everybody
will be able to try ARC HS with SMP.
[1] https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
ARC nSIM simulates pretty much any modern ARC core,
moreover it emulates a lot of different core features so
it is possible to play with them even wo real hardware.
Thus we add yet another ARC core family to be used on simulated
nSIM board.
For now it's just a basic configuration with ARC UART for
smoke-testing of Zephyr on ARC HS CPUs.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
The zephyr-file role creates a link to the GitHub copy of a file. Some
files have been moved so update the file references in the documentation
(found by scanning for uses of :zephyr-file:)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
ARC nSIM simulates all flavors or ARC cores so there's
no point in limiting its usage to ARC EM family only.
Moreover with upcoming addition of ARC HS family support
in Zephyr we'll be re-using nSIM "board" for them as well.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Watson Zeng