There are not enough bits in k_thread.thread_state with SMP enabled,
and the field is (should be) private to the scheduler, anyway. So
move state bits to the _thread_arch where they belong.
While we're at it, refactor some offset data w/r/t _thread_arch
because it can be shared between 32- and 64-bit subarches.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
k_thread.thread_state (or rather, _thread_base.thread_state) should be
private to the kernel/scheduler, so flags previously stored there are
moved to _thread_arch where the belong.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Map eSPI UART traffic to UART1 on MEC1501 modular board.
Remove unnecessary dts fields
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
When a eSPI slave needs to send back-to-back packets
updating status signal need to guarantee both status
reach the eSPI host, i.e. SCI=0 followed by SCI=1.
This change guarantees both packets are transmitted
over esSPI bus.
Allow to map eSPI host logical UART to a soc UART.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Update the module revision so that the following commit becomes
effective:
* nrfx_config_nrf9160: Remove dependency on DT from NRF_* mappings
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable CMSDK GPIO driver on v2m_musca SoC/Board. Add LEDs that are on
the board and init the pinmux for those LEDs to work.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds an extra step at the end of build to generate a flashable
image using Microchip tool available at:
https://github.com/MicrochipTech/CPGZephyrDocs
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove ctf_middle layer and have only ctf_top and ctf_bottom.
Port functionality from ctf_middle to ctf_top and remove
ctf_middle.h file. Update associated documentation.
Signed-off-by: Mrinal Sen <msen@oticon.com>
This is bad practice and may conceal issues on platforms
not in the whitelist.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
when enable CONFIG_CUSTOM_SECTION_ALIGN, it need less alignment
memory for image rom region. But that needs carefully configure
MPU region and sub-regions(ARMv7-M) to cover this feature.
Fixes: #17337.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Python's Sets are not deterministic. This causes the following lines to
be emitted in random order in generated/syscall_dispatch.c
extern u32_t z_mrsh_k_object_release(u32_t arg1, ...
extern u32_t z_mrsh_k_object_access_grant(u32_t arg1, ...
extern u32_t z_mrsh_k_object_alloc(u32_t arg1, ...
Change noweak to a basic list.
Reproducibility regression introduced by commit 6564974bae
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
In the main Addr handler code the F1 workaround was used.
Add compile time swith depending on SOC family.
So workaround is not afffecting F2/F4 families.
Signed-off-by: Pavlo Hamov <pavlo_hamov@jabil.com>
The algorithm for converting broken-down civil time to seconds in the
POSIX epoch time scale would produce undefined behavior on a toolchain
that uses a 32-bit time_t in cases where the referenced time could not
be represented exactly.
However, there are use cases in Zephyr for civil time conversions
outside the 32-bit representable range of 1901-12-13T20:45:52Z through
2038-01-19T03:14:07Z inclusive.
Add new API that specifically returns a 64-bit signed seconds count, and
revise the existing API to detect out-of-range values and convert them
to a diagnosible error.
Closes#18465
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
timeutil_timegm() does not modify the passed structure, so it should
indicate that in the signature (even though the GNU extension does not).
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Added in 2.0, along with some binding format simplifications in 2.1.
Bunch of other stuff that could be mentioned, but keep it relatively
short.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patch adds support for configuring the MAC address through the
Network Management API to the STM32 Ethernet driver.
Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
This enables the PWM blocks in DTS. Only PWM0 has been enabled
and tested due to board/jumper configurations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Each and every instance has a specific pin.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
A 16bits on/off based PWM, found on MEC1501.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Given the RTC is used for system clock, we need to plug its interrupt
to avoid an exception that would occur if it is left unhandled.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The RTC on TI CC13X2/CC26X2 is a 32 KHz clock for which the minimum
compare delay is 3 ticks. When using it as the system clock, we need
to relax the upper bound to ensure the test succeeds.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Add RTC timer driver for CC13X2/CC26X2, and use it instead of systick
as system clock. It is necessary to use this timer for power
management support, so that the system can exit from deep sleep upon
expiry of timeouts.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This moves check_perm code under GAT and make use of it to check if CCC
write permission can be attended by the connection security level or if
it needs to be increased.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This adds support to set different permissions to CCCD so security can
be checked when enabling notification which conforms to:
BLUETOOTH CORE SPECIFICATION Version 5.1 | Vol 3, Part G page 2360:
'3.3.3.3 Client Characteristic Configuration
Authentication and authorization may be required by the server to
write the configuration descriptor.'
In addition to that also ensure that notification are not re-enabled
until the proper security level is reached to conform to the following
statement:
'10.3.1.1 Handling of GATT indications and notifications
A client “requests” a server to send indications and notifications
by appropriately configuring the server via a Client Characteristic
Configuration Descriptor. Since the configuration is persistent
across a disconnection and reconnection, security requirements must
be checked against the configuration upon a reconnection before
sending indications or notifications. When a server reconnects to a
client to send an indication or notification for which security is
required, the server shall initiate or request encryption with the
client prior to sending an indication or notification. If the client
does not have an LTK indicating that the client has lost the bond,
enabling encryption will fail.'
Fixes#17983
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Fix a Coverity warning when using %d to print the result
of a sizeof(...)
Since the result of the sizeof() use in the example
will always fit in a int, simply cast the result
to a int so the %d is always correct.
Fixes: #18373
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use the named representation for no-wait to future-proof against a
change to the representation of timeout values.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This patch adds support for SDSCv1 and SDSCv2 cards. It has been tested
with 2 GiB SDSC and 4 GiB to 32 GiB SDHC cards from SanDisk.
Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
Remove logging helper variable `trace_dir` from device configuration
data when it is not needed.
Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
The SensorTile.box is a board designed for IoT applications
embedding a wide range of intelligent low power MEMS sensors,
a STM32L4 microcontroller to manage sensor configuration and
process sensor output data, a micro-USB battery charging
interface and an ST Bluetooth Low Energy module for wireless
communication with a BLE-enabled smartphone.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit adds:
1. pin definitions for SPI1 on PE12-15 on STM32L4 devices
2. SPI3 on PA15_SPI3_NSS
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The correct suffix name for selecting the GPIO for SPI Chip Select
is _CS_GPIOS_CONTROLLER and not _CS_GPIO_CONTROLLER.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Andrei Emeltchenko