OrgZephyr/zephyr
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2 Commits

Author SHA1 Message Date
Savinay Dharmappa 76676651f4 dts: intel_s1000: Enable generating IRQ priority. 
patch enable generating IRQ priority for designware
interrupt controller used in intel_s1000

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
 2018-05-22 09:30:14 -04:00
Savinay Dharmappa 7be3236ca4 dts: interrupt_controller: Add dts support for DesignWare controller 
Add dts support for multilevel DW interrupt controller

Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
 2018-05-01 16:46:41 -04:00