This enables LiteX PRBS random number generator driver
for litex_vexriscv board.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Edited the index.rst file to say spi functionality is included. Also
edited the .yaml file in the boards directory to support spi for sanity
tests.
Signed-off-by: Jose Manuel Pacheco Luna <manuel.pacheco@nxp.com>
Added in enablement for the SPI-0 instance pins, as found in the
board schematic files. These connect to the arduino headers on the
front of the board.
Signed-off-by: Jose Manuel Pacheco Luna <manuel.pacheco@nxp.com>
64BIT has no prompt. Assignments in configuration files have no effect
on symbols without prompts. A prompt means the symbol is
user-configurable.
64BIT is instead enabled indirectly through being selected by
BOARD_QEMU_RISCV64, which is enabled in the same configuration file.
Detected through some work-in-progress improved error checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The HiFive1 boards power up using a 32 KiHz low frequency kernel, so
have a cycle rate of 32768 Hz. The board definitions have not been
revisited since the Zephyr default for ticks-per-second increased from
100 to 10000. The timer system on the board does not operate
correctly at 4 cycles per tick, but does at 328 cycles per tick.
To support functional timers while keeping system milliseconds in sync
with clock time set ticks-per-second to 128.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Provide the mapping from FE310-G002 GPIO pins to the Arduino Uno
headers. Note where pins have pre-assigned functions that may
interfere with use as GPIOs with the default pinmux assignments.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Explicitly configures the rgb led pinmuxes as gpios. Currently the gpio
driver quietly changes the pinmux to gpio mode when configuring a gpio
pin, but this behavior is about to change.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The SPI NOR driver requires that the size (in bits) be provided in the
devicetree node. Update the binding to make the property required,
and update all nodes based on the memory chip identified.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Specific SW defined BLE LL parameters need to be set
if the user enables it on this platform. As such, conditionally
enable them directly into the defconfig.
INTMUX CH2 and CH3 are not available to be used if BT support
is enabled on Vega, because they are used internally by the
BLE SW LL
Signed-off-by: David Leach <david.leach@nxp.com>
Since the experimental BLE software link layer is enabled on
the VEGABoard, add some information about it, as well as the
limitations.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Having a pin toggle when the code reaches a certain point
is really useful for debugging; the infrastructure is already
in place for Nordic boards, so just build upon and enable the
mechanism on the Vega board as well.
Signed-off-by: David Leach <david.leach@nxp.com>
The board area was renamed from riscv32 to riscv back in July to
accommodate riscv64 support. Fix the remaining references in
documentation.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use this short header style in all Kconfig files:
# <description>
# <copyright>
# <license>
...
Also change all <description>s from
# Kconfig[.extension] - Foo-related options
to just
# Foo-related options
It's clear enough that it's about Kconfig.
The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)
git ls-files '*Kconfig*' | \
xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Enable the MX25R32 SPI NOR Flash on the VEGAboard and provide board
config file for the spi_flash sample.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).
Go for the most common style:
- Indent properties with a single tab, including for choices.
Properties on choices work exactly the same syntactically as
properties on symbols, so not sure how the no-indentation thing
happened.
- Indent help texts with a tab followed by two spaces
- Put a space between 'config' and the symbol name, not a tab. This
also helps when grepping for definitions.
- Do '# A comment' instead of '#A comment'
I tweaked Kconfiglib a bit to find most of the stuff.
Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Added in commit f9efca4b4f ("boards: riscv32: add LiteX VexRiscV
board"), then never used.
Found with a script.
Also change UART_LITEUART from a 'menuconfig' symbol to a 'config'
symbol, as it's no longer followed by symbols that depend on it
(UART_LITEUART_PORT_0 should have been a plain 'config' too).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Same deal as in commit 7fdb525754 ("kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), but I hacked Kconfiglib to also
find cases where the type is given separately as e.g.
config FOO
int
default 3
Motivation (from a note in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html):
For a symbol defined in multiple locations (e.g., in a
Kconfig.defconfig file in Zephyr), it is best to only give the
symbol type for the "base" definition of the symbol, and to use
'default' (instead of 'def_<type>' value) for the remaining
definitions. That way, if the base definition of the symbol is
removed, the symbol ends up without a type, which generates a
warning that points to the other definitions. That makes the extra
definitions easier to discover and remove.
It's also nice if 'def_bool' and the like turn into a semi-reliable flag
that the symbol is only defined in Kconfig.defconfig files. That might
be a sign that things could be cleaned up.
Will do a separate pass later to remove some symbols only defined in
Kconfig.defconfig files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Replace:
dt_chosen_reg_addr
dt_chosen_reg_size
dt_node_reg_addr
dt_node_reg_size
with:
dt_chosen_reg_addr_int
dt_chosen_reg_size_int
dt_chosen_reg_addr_hex
dt_chosen_reg_size_hex
dt_node_reg_addr_int
dt_node_reg_size_int
dt_node_reg_addr_hex
dt_node_reg_size_hex
So that we get the proper formatted string for the type of symbol.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that all I2C drivers utilize DTS we can select HAS_DTS_I2C in a
common place and don't need to do it per driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We need to be able to specify GPIO flags in devicetree without that
preventing translation from the Arduino specifier to the host GPIO
specifier. Set up to ignore the low 6 bits of the flags field when
matching the child specifier, and to copy those bits to the parent
specifier.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
found some references to files (via :zephyr_file: and :zephyr-app:) that
were moved, so the links were broken
Fixes: #19660
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Enable LiteX DNA ID driver in litex_vexriscv board.
Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
As recommended in cmake/app/boilerplate.cmake, ZEPHYR_BASE should
be preferred to PROJECT_SOURCE_DIR.
Do the change for all boards still referring to PROJECT_SOURCE_DIR.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update a number of boards that have arduino_gpio and arduino_i2c
support in their dts files to show that they support that in the
board.yaml file. This allows coverage on several shield tests that
utilize the tags 'arduino_gpio' and 'arduino_i2c'.
Exlucde stm32mp157c_dk2 from some of the samples right now since the
connector on the board doesn't support A2/A3. Also remove the duplicate
of exluding disco_l475_iot1.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The project's README.rst references the support board docs with an URL
that's not working these days (see
https://github.com/zephyrproject-rtos/infrastructure/issues/134) so fix
that URL reference. While looking for other similar linking cases, I
found a hard URL references that should be using :ref: role, and a
release notes reference to a (now) broken link (fixing that in the
/latest/ version of the 1.10 release notes).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
While trying out the hello_world sample built for QEMU, I was expecting
the sample app to exit and I'd return to a command prompt. Nope. You
need to exit QEMU manually, so add that step to the sample instructions.
Looking around, there are more uses of QEMU like this that could use
this added step after running the sample app.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
For OpenVega board, in the case of the Zero Riscy core,
the flash partition used for the code and data is the
M0 ARM core's 256KB flash region. This is closest to
the RISC core.
The m0_flash node defines where the interrupt vector
is located for the Zero Riscy core, and one needs to
restrict the application so its interrupt vector is
placed accordingly.
Fixes: 34b0516466 ("boards: riscv32: rv32m1_vega:
enable MCUboot for ri5cy core")
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.
Redirects for the web documentation are also included.
Then zephyrbot complained about this:
"
New files added that are not covered in CODEOWNERS:
dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi
Please add one or more entries in the CODEOWNERS file to cover
those files
"
So I assigned them to those who created them. Feel free to readjust
as necessary.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Robert Winkler