Commit Graph

17 Commits

Author SHA1 Message Date
Wayne Ren 2b3c9905fe boards: nsim: add missed -firq for nsim_hs_smp
nsim_hs_smp has 2 reg banks, so it should have firq

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-11-13 12:04:18 -08:00
Ulf Magnusson bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Watson Zeng 7064033473 board: nsim: doc update for debugging section
doc update for debugging dection for #17547 issue.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2019-08-14 16:04:46 -07:00
Wayne Ren 13cf5c227f boards: nsim: disable CONFIG_SMP by default for nsim_hs_smp
* CONFIG_SMP can be enabled by smp application, e.g. tests/kernel/smp
* if application is not designed for smp, CONFIG_SMP can be disabled,
and the target works as a single processor.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-11 21:18:38 +02:00
Alexey Brodkin 408433d5c7 board/nsim: Add support of multi-core ARC HS platform in nSIM
Now when SMP support for ARC is available we may introduce a simulation
platform which might be used for testing & development for SMP setups.

One important note is stand-alone nSIM (as well as its "Free" flavour)
doesn't support SMP simulation so we have to switch to use of nSIM via
proprietary MetaWare debugger [1] and so:
 1. We introduce new emulation target "mdb"
 2. It's only possible to run that platform for those who
    have MetaWare tools installed and valid license.

Though QEMU port for ARC is in work at the moment and once we
open that port and it has SMP support we'll switch to it and everybody
will be able to try ARC HS with SMP.

[1] https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-08-11 21:18:38 +02:00
Wayne Ren 1e2d42273e boards: nsim: add initial support of normal/non-secure application
normal/non-secure application: nsim_sem_normal

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Kumar Gala a5ae0daa35 dts: arc: Remove device_type = "memory" from {d,i}ccm nodes
The "{d,i}ccm" nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are {d,i}ccm.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-06 08:59:22 -04:00
Alexey Brodkin 61f073a735 board/nsim: Add support of ARC HS cores in nSIM
ARC nSIM simulates pretty much any modern ARC core,
moreover it emulates a lot of different core features so
it is possible to play with them even wo real hardware.

Thus we add yet another ARC core family to be used on simulated
nSIM board.

For now it's just a basic configuration with ARC UART for
smoke-testing of Zephyr on ARC HS CPUs.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-31 09:25:15 -07:00
Alexey Brodkin 7da47e6313 boards/nsim: Enable unaligned data acess for nSIM with simple ARC EM
This will give us a possibility to check unaligned read/write support
in simulation.

Note nSIM with S(ecure)EM (with secure option) doesn't support that
mode in HW.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-31 09:25:15 -07:00
Piotr Zięcik 7d56fc35fd dts: Add information about CPU frequency to the cpu nodes
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:

- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
  in order to configure USB clock source.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-17 21:53:36 +02:00
David B. Kinder db60d4919a doc: fix broken references to zephyr files
The zephyr-file role creates a link to the GitHub copy of a file.  Some
files have been moved so update the file references in the documentation
(found by scanning for uses of :zephyr-file:)

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-06-18 16:01:55 -04:00
Marti Bolivar 35d4e62300 boards: allow cmake-time overrides of all runners
Convert all board_set_xxer(foo) calls to board_set_xxer_ifndef(foo),
which allows the user to make their own decision at CMake time.

Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
2019-06-07 13:43:51 +02:00
Marti Bolivar 1717332c7a cmake: add helpers for setting board runners
This helps by letting us add checks for when the runner has already
been set. There is documentation saying you can set
-DBOARD_DEBUG_RUNNER at the command line and have it take effect,
which turns out not to be true for a large number of boards.
A status message helps the user debug.

(We'll address the existing in-tree boards in the next patch.)

Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
2019-06-07 13:43:51 +02:00
Alexey Brodkin 40dbec4cd1 ARC: Mention ARC EM family instead of EM4 template
ARC EM4 is just a baseline configuration of ARC EM family of CPU cores.
But with addition of more featuers like caches, DSP extensions etc
we're effectively getting EM6, EM5D etc templates.

So to not confuse users let's talk about families of ARC cores
as that's what makes sense together with extra features but not
templates itself.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-06 14:20:42 -04:00
Alexey Brodkin c5663caf77 board/nsim: Refactor device tree description
Instead of blind copy of nsim_em.dts re-structure this way:
 * nsim.dtsi     - Top-level "board" description re-usable for
 |                 all nSIM-based "boards".
 |
 |                 Even though it's not needed right now but it
 |                 allows to add other ARC core families in the future.
 |
 \_ nsim_em.dtsi - Common definitions for boards with ARC EM cores
    |
    \_ Real boards with ARC EM cores
      |
      \ nsim_em.dts
      \ nsim_sem.dts
      \ nsim_em_mpu_stack_guard.dts
      \ nsim_sem_mpu_stack_guard.dts

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-06 14:20:42 -04:00
Alexey Brodkin 797165044f board/nsim: Move CPU selection in defconfigs
This will allow us to easily specify other CPUs looking
forward and not rely on any default value.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-06 14:20:42 -04:00
Alexey Brodkin b1dcf05c68 board/nsim: Make it CPU-family independent
ARC nSIM simulates all flavors or ARC cores so there's
no point in limiting its usage to ARC EM family only.

Moreover with upcoming addition of ARC HS family support
in Zephyr we'll be re-using nSIM "board" for them as well.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-06 14:20:42 -04:00