Commit Graph

10 Commits

Author SHA1 Message Date
Florian Vaussard 5491c29314 i2c: stm32_ll: Fix spurious error while reading using IRQ
We can have a spurious error while performing a transfer using IRQ. This
happens when the last message of the transfer is a read with a STOP
condition. We must disable the RX interrupt while waiting for the STOP
interrupt, otherwise we will get a spurious RX interrupt which will lead
to an error.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 59d33b5f27 i2c: stm32_ll: add support for STM32F0 with combined irq
The STM32F0 has only a single IRQ line, add a combined IRQ handler.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Daniel Wagenknecht 02a46e7197 drivers: i2c_ll_stm32_v2: don't use while loops in interrupt mode
Waiting for transfer complete and stop condition uses while loops
even when interrupt mode is enabled.
Implement use of TC, TCR and STOP interrupt for interrupt mode.
msg_done is not needed in interrupt mode anymore, so move it
to non-interrupt section
Tested with stm32f3_disco board.

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2017-11-28 11:21:06 -06:00
Daniel Wagenknecht 5380bc597f drivers: i2c_ll_stm32_v2: reorder to remove duplication
Disabling of Interrupts is duplicated. Move it to a position
that is common to messages that end with and without errors.

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2017-11-28 11:21:06 -06:00
Yannis Damigos cf2eb7d1fa drivers: i2c_ll_stm32_v2: Use the correct flags in event ISR
Event ISR checks if the TX/RX interrupts is enabled instead
of the TXIS/RXNE interrupt status flags. Use the TXIS/RXNE
interrupt status flags to check which interrupt event
happened.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2017-11-15 09:09:58 -06:00
Yannis Damigos b80da2b710 drivers: i2c_ll_stm32: Use I2C API flags
STM32 I2C driver doesn't use the I2C API flags STOP/RESTART,
instead it uses its own RESTART flag. As a result, I2C API's
i2c_burst_write* funtions doesn't work. This patch makes
STM32 I2C driver to use I2C API flags.

Tested on: 96b_carbon, olimexino_stm32 (i2c_ll_stm32_v1)
Tested on: stm32f3_disco, disco_l475_iot1 (i2c_ll_stm32_v2)

Fixes: #4459

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2017-11-15 09:09:58 -06:00
Daniel Wagenknecht c404c3b241 i2c: fix issue of stm32-i2c-v2 (F0/F3/F7) driver hanging in endless loop
Fixes #4429
Driver didn't work properly when a transfer consisted of multiple
messages.
Fix doesn't use auto end mode anymore. msg_done function waits for
transfer to complete and issues stop condition if necessary.

Tested with stm32f3_disco board and samples/drivers/i2c_fujitsu_fram
example adapted to use I2C_1 as I2C_DEV

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2017-11-03 13:52:57 -05:00
Kumar Gala 83643a2266 drivers: i2c: remove usage of bitfield access for cfg
Cleanup I2C drivers to not use bitfield access for config information
and instead use accessor macros that use shifts & masks.  This is
cleanup towards removing the bitfield access in the future.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-09-20 10:16:14 -05:00
Kumar Gala 4c233bbc05 i2c: stm32: fix build issue
When building tests/kernel/test_build/test_debug on disco_l475_iot1 we
get the following build error:

drivers/i2c/i2c_ll_stm32_v2.c: In function ‘stm32_i2c_configure_timing’:
ext/hal/st/stm32cube/stm32l4xx/soc/stm32l4xx.h:207:38: error: ‘timing’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
 #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
                                      ^
drivers/i2c/i2c_ll_stm32_v2.c:265:8: note: ‘timing’ was declared here
  u32_t timing;
        ^~~~~~

Fix by initializing timing to 0.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-06 09:53:00 -05:00
Jorge Ramirez-Ortiz 21fbc9b07e drivers: i2c: stm32 LL F1/F4 (v1) STM32 F3/L4X (v2)
Supports STM32 F1/F4 (v1 controller) and STM32 F3/L4X (v2
controller)

v1 could also support L1X.
v2 could also support F7X.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Reviewed-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-07-01 08:36:51 -04:00