The kernel timer frequency was incorrectly set to the system clock
frequency (528 MHz) instead of the core clock frequency (600 MHz).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Unlike other NXP SoCs currently in Zephyr, the mimxrt1052 has the ARM
MPU rather than the NXP MPU. Start out by enabling it with a simple set
of memory regions for "flash" (ITCM), "ram" (DTCM), and the peripheral
buses. More regions will need to be added when we implement support for
external memories.
Tested with:
- samples/mpu/mpu_stack_guard_test
- tests/kernel/mem_protect/protection
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds support for the NXP MIMXRT1050-EVK board, an entry-level
development board for the new mimxrt1052 Cortex-M7 SoC.
Adds pinmuxing, dts, documentation, and jlink debug support for the new
board. Note that pinmuxing uses the mcux pinmux driver directly rather
than the Zephyr pinmux interface. The mimxrt1052 SoC has complicated
pinmuxing that may require changing the Zephyr pinmux interface to
support, so for now let's use the mcux driver directly.
We are also not yet configuring the external flash, therefore a debugger
is required to load code to the internal sram. The on-board OpenSDA
circuit with jlink firmware is sufficient, and the 'make debug' build
target is supported.
Samples tested include: hello_world, philosophers, synchronization,
basic/blinky, and basic/button.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Maureen Helm