OrgZephyr/zephyr
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zephyr
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3 Commits

Author SHA1 Message Date
Benjamin Walsh ec47784a28 test_mem_safe: support ARM 
Test works for ARM, but not testing sys_mem_safe_write_to_text_section()
since base ARM image are XIP images.

This test could be enhanced to  boot a secondary non-XIP image for ARM
to test writing to .text.

Change-Id: I56aef68afabe88588b61c273901491de0c24a39b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
 2016-02-05 20:25:24 -05:00
Anas Nashif 590aa82517 sanity: disable mem_safe testcase on iamcu platforms 
clflush and mfence are not supported on `iamcu'

Change-Id: I25b7c582de3b8e2bbea3f219d4655c16763410f8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2016-02-05 20:25:04 -05:00
Benjamin Walsh c433fc7f8a test: add nanokernel mem_safe test 
This test can only be executed on x86.

Change-Id: I4fe60dbee9dcb11f983855b507f53c2b9fbb54d0
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
 2016-02-05 20:24:42 -05:00