Commit Graph

33863 Commits

Author SHA1 Message Date
Ioannis Glaropoulos 44f3b79b6f tests: arch: arm: fix bug in z_assert expression
The commit fixes two assert expressions in the test,
which evaluate the return value of _swap(.) function
and the value of the thread's swap return variable.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-22 23:30:37 +02:00
Ioannis Glaropoulos be2eb2a19f tests: arch: arm thread swap: fix r0 preservation in the test
We use inline assembly to store the return value of _swap(..)
function directly into r0 (in order to ensure that r4-r11
registers are not touched at this point). But we need to store
the r0 into some global memory, to retain the value until we
check it later in an assert expression, otherwise the
compiler may overwrite r0 in subsequent instructions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-22 23:30:37 +02:00
Ulf Magnusson 4c6ea2d160 scripts: edtlib: Skip fully loading bindings in more cases
As a slightly hairy but important optimization inherited from the old
scripts, the binding loading code only looks at binding files whose raw
text contains one of the compatible strings from the devicetree. For
such files, a second pass parses the file as YAML and tries to extract a
compatible string, and skips the file if it fails (e.g. due to spurious
text matches in 'include'd binding fragments).

Until now, the binding would always get fully loaded (have 'include'd
files merged in, checks run, etc.) if the second pass managed to extract
a compatible.

Do slightly better by only fully loading the binding if the extracted
compatible from the second pass appears in the devicetree. This gets rid
of unnecessary binding loading in rare cases.

Discovered by test-bindings/deprecated.yaml getting loaded even when
everything that referenced it in test.dts was commented out, because it
happened to mention 'child-binding' in a comment.

Also add a check for YAML errors in the second pass, to be slightly more
robust. Print a warning if a file that isn't valid YAML is found.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-22 09:17:53 -05:00
Ulf Magnusson b5fad77554 west.yml: Update ci-tools to always show checkpatch warnings
Get these commits in, which together make it so that warnings from
checkpatch.pl are always shown, even when the check succeeds.

 - Commit 72f74d7 ("check_compliance.py: Add support for informational
   messages")

 - Commit 9d46f5b ("check_compliance.py: Always show warnings from
   checkpatch.pl")

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-22 09:36:57 -04:00
Charles E. Youse 34120b9ee5 boards/x86/gpmrb: disable Multiboot header generation
We don't require this to boot with SBL, so disable for now.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Charles E. Youse 78c9e8f8cc tests/benchmarks/boot_time: disable on inapplicable targets
Minnowboard and ACRN do not use the new APIC timer, so the
benchmark code will not run on them (yet).

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Charles E. Youse 223ac780d3 tests/benchmarks/boot_time: disable on QEMU targets
These all currently use the HPET timer, and thus can't build with
BOOT_TIME_MEASUREMENT enabled, so disable for now. This test is
basically a build-only test, so we're covered with the other x86
targets (gpmrb, up_squared) for now.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Charles E. Youse 3bc79fdf2c arch/x86: refactor APIC timer configuration to SoC level
The APIC is part of the SoC, not the board, so move the defaults down.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Charles E. Youse 3036faf88a tests/benchmarks: fix BOOT_TIME_MEASUREMENT
The boot time measurement sample was giving bogus values on x86: an
assumption was made that the system timer is in sync with the CPU TSC,
which is not the case on most x86 boards.

Boot time measurements are no longer permitted unless the timer source
is the local APIC. To avoid issues of TSC scaling, the startup datum
has been forced to 0, which is in line with the ARM implementation
(which is the only other platform which supports this feature).

Cleanups along the way:

As the datum is now assumed zero, some variables are removed and
calculations simplified. The global variables involved in boot time
measurements are moved to the kernel.h header rather than being
redeclared in every place they are referenced. Since none of the
measurements actually use 64-bit precision, the samples are reduced
to 32-bit quantities.

In addition, this feature has been enabled in long mode.

Fixes: #19144

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Charles E. Youse efcecea6aa subsys/debug: eliminate PEFORMANCE_METRICS and CPU_CLOCK_FREQ_MHZ
Neither of these options is actually used; CPU_CLOCK_FREQ_MHZ appears
to have been part of x86 BOOT_TIME_MEASUREMENT at some point, and
PERFORMANCE_METRICS is the stillborn cousin of EXECUTION_BENCHMARKS.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Kumar Gala 78edc96a25 boards: mec1501modular_assy6885: Reduce image file size
Vastly reduced the image size as the files were extremely large.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-21 13:35:14 -07:00
Kumar Gala ddfeafa7f7 boards: mec1501modular_assy6885: Reduce image file size
Removed mec15xxevb_assy6853.jpg as its not used and vastly reduced
the image size as the files were extremely large.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-21 13:35:14 -07:00
Jakub Wegnerowski ab1ba3d4cf drivers: hwinfo: Add LiteX DNA driver
This commit adds driver supporting reading DNA ID value for LiteX SoC
builder.

Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-09-21 21:36:00 +02:00
Jakub Wegnerowski d57a3634f7 boards: litex_vexriscv: Enable LiteX DNA driver
Enable LiteX DNA ID driver in litex_vexriscv board.

Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-09-21 21:36:00 +02:00
Anas Nashif 10ee87a80b disk: sdhc: fix command name sdhc_cmd_r1
Apparently a typo that went in undetected, replace sdhc_cmd_r1 with
correct command name.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-21 12:49:47 -05:00
Stephanos Ioannidis f628dcd83b kernel: Fix _K_QUEUE_INITIALIZER portability issue.
_K_QUEUE_INITIALIZER macro provides initialisation for k_queue struct,
which contains an anonymous union.

Older versions of GCC (<= 4.5), even when compiling with -std=gnu99,
do not allow specifying members of an anonymous union without braces
in an initialiser, so it is necessary to add braces around anonymous
union members.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-09-21 10:46:21 -04:00
Ulf Magnusson 110526ec0e scripts: edtlib: Add a Device.children attribute with child Devices
API oversight. This was meant to be there all along together with
Device.parent, for navigating the devicetree, but since a need for it
never came up in gen_defines.py, it got overlooked.

Devices are just devicetree nodes augmented with binding information and
some interpretation of devicetree properties. I wonder if the name
should be changed to something like edtlib.Node to make that clearer.
Calling something like a flash partition a "device" is a bit weird, as
Galak pointed out.

I think I went with Device originally to avoid confusion with
dtlib.Node, but since edtlib users don't directly interact with dtlib,
it might not be that confusing in practice.

Piggyback some documentation clarifications.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-21 09:10:36 -05:00
Ulf Magnusson 2f2642d5f6 scripts: testedtlib.py: Generate SystemExit on test failures
The devicetree check in check_compliance.py in ci-tools expects the
dtlib/edtlib test suites to exit with sys.exit() (which raises
SystemExit) on test failures, and interprets Exception as an internal
error in the test suite.

testedtlib.py accidentally raised Exception on test failures, making
check_compliance.py error out and skipping the rest of the tests when
there were failures. Fix it.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-21 09:08:56 -05:00
Andrei Emeltchenko 5e0bfafcf8 doc: mec15xxevb_assy6853: Correct socket name
Fix incorrect SPI socket name.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2019-09-20 14:32:12 -04:00
Charles E. Youse a95c94cfe2 arch/x86/ia32: move IA32 thread state to _thread_arch
There are not enough bits in k_thread.thread_state with SMP enabled,
and the field is (should be) private to the scheduler, anyway. So
move state bits to the _thread_arch where they belong.

While we're at it, refactor some offset data w/r/t _thread_arch
because it can be shared between 32- and 64-bit subarches.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-20 14:31:18 -04:00
Charles E. Youse a224998355 arch/x86/intel64: do not use thread_state for arch data
k_thread.thread_state (or rather, _thread_base.thread_state) should be
private to the kernel/scheduler, so flags previously stored there are
moved to _thread_arch where the belong.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-20 14:31:18 -04:00
Jose Alberto Meza 437256d17c boards: mec15xxevb: Select physical UART mapped to eSPI host logical port
Map eSPI UART traffic to UART1 on MEC1501 modular board.
Remove unnecessary dts fields

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-20 14:30:40 -04:00
Jose Alberto Meza e9dd54ed1c drivers: espi: xec: Ensure all eSPI VW are transmitted
When a eSPI slave needs to send back-to-back packets
updating status signal need to guarantee both status
reach the eSPI host, i.e. SCI=0 followed by SCI=1.
This change guarantees both packets are transmitted
over esSPI bus.

Allow to map eSPI host logical UART to a soc UART.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-20 14:30:40 -04:00
Jose Alberto Meza ac16bf7f4c dts: espi: Cleanup eSPI block device tree
Move MCHP-defined NVIC interrupts to interrupts field.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-20 14:30:40 -04:00
Andrzej Głąbek 97e38c226c modules: hal: nordic: Remove dependency on DT from NRF_* mappings
Update the module revision so that the following commit becomes
effective:

* nrfx_config_nrf9160: Remove dependency on DT from NRF_* mappings

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-09-20 17:16:35 +02:00
Kumar Gala f54ab8c4fb arm: v2m_musca: Enable GPIO support
Enable CMSDK GPIO driver on v2m_musca SoC/Board.  Add LEDs that are on
the board and init the pinmux for those LEDs to work.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-20 10:05:18 -05:00
Kumar Gala 30795143c4 boards: v2m_musca: Add pyocd support
Enable pyocd support on musca-a1 board.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-20 10:05:18 -05:00
Huang Qi 2c277077fe arch: riscv: Use infinite loop instead of simple wfi to halt slave core
If it's a multicore system, infinite loop wfi to halt slave core

Signed-off-by: Huang Qi <757509347@qq.com>
2019-09-20 10:42:28 -04:00
Huang Qi 19da4ee379 arch: riscv: Add simple wrokaround to boot multicore system
Just boot master core, halt others

Signed-off-by: Huang Qi <757509347@qq.com>
2019-09-20 10:42:28 -04:00
Daniel Leung e85407db41 board: mec15xxevb_assy6853: generate flashable image
This adds an extra step at the end of build to generate a flashable
image using Microchip tool available at:
https://github.com/MicrochipTech/CPGZephyrDocs

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-20 09:09:51 -04:00
Mrinal Sen 9fbc5fcd16 debug: tracing: Common Trace Format Simplification
Remove ctf_middle layer and have only ctf_top and ctf_bottom.
Port functionality from ctf_middle to ctf_top and remove
ctf_middle.h file. Update associated documentation.

Signed-off-by: Mrinal Sen <msen@oticon.com>
2019-09-20 09:06:38 -04:00
Jukka Rissanen 49a4144ac5 tests: net: hostname: Add tests for hostname set/get
Add tests that set or get system network hostname.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-09-20 11:42:51 +03:00
Erwin Rol 36df90816b dts: arm: stm32: cleanup whitespace in dts_fixup headers
Try to format the dts_fixup header files as uniformly as possible.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2019-09-20 09:50:34 +02:00
Andrew Boie c91b9b37d0 tests: net: stop whitelisting
This is bad practice and may conceal issues on platforms
not in the whitelist.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-20 09:21:11 +03:00
Wolfgang Puffitsch bc2abd5cf3 Bluetooth: host: Fold consecutive calls to bt_rand into one
Calls to bt_rand can be expensive, folding consecutive calls into one
reduces the overhead.

Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
2019-09-20 08:22:18 +03:00
Jorgen Kvalvaag d50fb31e19 scripts: sanitycheck: Multiple --west-flash arguments
Make --west-flash support multiple arguments

Signed-off-by: Jorgen Kvalvaag <jorgen.kvalvaag@nordicsemi.no>
2019-09-19 22:19:49 -04:00
Wentong Wu 09af98aba9 scripts: gen_relocate_app.py: add custom align size for relocation
add custom align size for code relocation to reduce alignment memory
wasting.

Fixes: #17337.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2019-09-19 21:38:31 -04:00
Wentong Wu da31c81737 linker: add custom align size to reduce alignment memory wasting
when enable CONFIG_CUSTOM_SECTION_ALIGN, it need less alignment
memory for image rom region. But that needs carefully configure
MPU region and sub-regions(ARMv7-M) to cover this feature.

Fixes: #17337.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2019-09-19 21:38:31 -04:00
Marc Herbert f987029282 gen_syscalls.py: make 'noweak' a list instead of a random order set
Python's Sets are not deterministic. This causes the following lines to
be emitted in random order in generated/syscall_dispatch.c

extern u32_t z_mrsh_k_object_release(u32_t arg1, ...
extern u32_t z_mrsh_k_object_access_grant(u32_t arg1, ...
extern u32_t z_mrsh_k_object_alloc(u32_t arg1, ...

Change noweak to a basic list.

Reproducibility regression introduced by commit 6564974bae

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-09-19 20:59:06 -04:00
Pavlo Hamov 85c1d90fd6 drivers: i2c: stm32_Slave: Fix addr flag handling
In the main Addr handler code the F1 workaround was used.
Add compile time swith depending on SOC family.
So workaround is not afffecting F2/F4 families.

Signed-off-by: Pavlo Hamov <pavlo_hamov@jabil.com>
2019-09-19 20:52:23 -04:00
Peter A. Bigot 55ace13c32 lib/timeutil: avoid implementation-defined behavior
The algorithm for converting broken-down civil time to seconds in the
POSIX epoch time scale would produce undefined behavior on a toolchain
that uses a 32-bit time_t in cases where the referenced time could not
be represented exactly.

However, there are use cases in Zephyr for civil time conversions
outside the 32-bit representable range of 1901-12-13T20:45:52Z through
2038-01-19T03:14:07Z inclusive.

Add new API that specifically returns a 64-bit signed seconds count, and
revise the existing API to detect out-of-range values and convert them
to a diagnosible error.

Closes #18465

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-09-19 20:49:51 -04:00
Peter A. Bigot cc1594a59a lib/timeutil: support const correctness for pointer parameter
timeutil_timegm() does not modify the passed structure, so it should
indicate that in the signature (even though the GNU extension does not).

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-09-19 20:49:51 -04:00
Ulf Magnusson 5bc06e8250 doc: release notes: Mention devicetree script changes for 2.0 and 2.1
Added in 2.0, along with some binding format simplifications in 2.1.

Bunch of other stuff that could be mentioned, but keep it relatively
short.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-19 20:48:23 -04:00
Markus Fuchs 8c69941642 drivers: ethernet: stm32: Add MAC address configuration support
This patch adds support for configuring the MAC address through the
Network Management API to the STM32 Ethernet driver.

Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
2019-09-19 20:46:56 -04:00
Daniel Leung e17cc8b4cd boards: mec15xxevb_assy6853: enable PWM in DTS
This enables the PWM blocks in DTS. Only PWM0 has been enabled
and tested due to board/jumper configurations.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-19 20:45:37 -04:00
Daniel Leung 2c3d287794 boards/mec1501: Configure pinmux relevantly for PWM
Each and every instance has a specific pin.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-19 20:45:37 -04:00
Daniel Leung 1ee9e1046a drivers/pwm: Add support for Microchip's XEC PWM devices
A 16bits on/off based PWM, found on MEC1501.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-19 20:45:37 -04:00
Tomasz Bursztyka bea2714cae dts/arm: Add the 9 MEC1501 PWM instances.
All disabled by default.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-09-19 20:45:37 -04:00
Tomasz Bursztyka 6a56b868a5 dts/bindings: Adding Microchip's XEC PWM
Found on MEC1501.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-09-19 20:45:37 -04:00
Vincent Wan 79d626f5c7 CODEOWNERS: Add entry for CC13x2/CC26x2 RTC timer driver
Adding @vanti as an owner.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-09-19 13:43:10 -05:00