Commit Graph

13 Commits

Author SHA1 Message Date
Feng Cheng ee57c8e749 drivers: flash: Add the flash driver of the stm32f1x family
Most of the code is copied from the stm32f0x family
Tested on stm32f103ze soc

Signed-off-by: Feng Cheng <i@fengch.me>
2019-12-11 12:40:33 -06:00
Richard Osterloh c68e027c28 drivers: flash: Add STM32G4X flash support
Add flash driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Francois Ramu bfc2ea6dd5 drivers: flash: Add STM32G0XX flash support
Add flash support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Anas Nashif 17ddd1714c cleanup: include/: move clock_control.h to drivers/clock_control.h
move clock_control.h to drivers/clock_control.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Erwan Gouriou d777413b19 drivers/flash: stm32wb: Add driver for stm32wb
Add flash driver for stm32wb

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-03 09:38:19 -04:00
Erwan Gouriou 82403f68e2 drivers/flash: Move STM32F3 to generic STM32 series driver
A common driver is shared between stm32 chips, which was not the case
for stm32f3 series. As a consequence stm32f3 was not maintained
equally and was missing features such as flash layout or dts based
configuration.
Besides, drivers had some flows such as wrong bus clock and
missing HSI clock activation which lead to issues on boards not
using HSI as main clock.
As a consequence this commit moves stm32f3 series flash driver to
common stm32 flash drivers.

Fixes #4197

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Aurelien Jarno 6752b5df3f drivers: flash: add driver for STM32F7x series
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
Flavio Ceolin 67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Neil Armstrong 32cb3f0220 flash: stm32: add support for STM32F0 flash controller
Add the STM32F0 Embedded Flash support in the flash_stm32 driver
interface.
The STM32F0 has a particularity or use the HSI as clock source
for the flash controller interface, so this clock must be
enabled directly in the case HSE or another clock is used by
the system clock.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Marti Bolivar 32482e9cb8 flash: stm32: stm32f4: add page layout support
Add flash page layout support for STM32F4 SoCs.

This almost eliminates the need for flash_map.h, except for
STM32F4X_SECTOR_MASK, so delete the file and move the define into the
F4 implementation, to keep things simple.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-09-11 11:41:57 -04:00
Marti Bolivar 4fea6dfe76 flash: stm32: clean up L4/F4 internal API
This is a prep work commit for adding flash page layout support.

The internal flash APIs for STM32 on L4 and F4 are a bit
inconsistent. Some routines take a pointer to the private data, others
don't. Those that do take it as a last argument instead of a
first. Additionally, some APIs are declared in flash_stm32.h that
aren't ever used by the family-specific files.

Clean this up by making everything take a struct device*, and marking
routines static in the common driver code when possible.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-09-11 11:41:57 -04:00
Michel Jaouen e9153979f0 flash: stm32: distinguish read/write for flash range valid
L4 write access requires 64 bits alignment
while L4 read access does not require any alignment.
To support specific check according to read/write,erase
a parameter is added to stm32_valid_range.

Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
2017-06-16 16:18:12 -04:00
Neil Armstrong a9183cd518 flash: Rework and add flash device support for STM32L4x SoCs
The STM32L4x SoCs embeds a slightly different embedded flash controller
from the STM32F4x SoCs.

This particular controller has the following properties :
 - Up to 2 512KiB banks divided in 2KiB pages
 - Flash can be accessed in any sizes
 - Flash must be written in 64bit aligned 64bit double-words

The drivers/flash/flash_stm32f4x.c is refactored into a new common
drivers/flash/flash_stm32.c and drivers/flash/flash_stm32l4x.c is
created with the STM32L4x specific functions.

To ease the refactoring and keep common functions, the STM32L4x flash
headers are slightly modified to match the hardware reference naming
and solve compilation issues.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-19 10:06:48 -04:00