1b1c80256f
dts: intel_s1000: add pinctrl to device tree
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Add pinctrl node to Intel S1000 SoC device tree for I/O MUX selection
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-29 14:23:24 -08:00
23f11933b9
dts: intel_s1000: enable DTS for GPIO
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Added GPIO to SoC device tree
Updated SoC DTS fixup
Removed Kconfig variables now replaced by DT
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-26 06:56:48 -08:00
cf58f83dd6
boards: xtensa: intel_s1000_crb: Enable SPI Master driver
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patch enables SPI Master driver on intel_s1000_crb
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-11-13 18:49:03 -05:00
45f0917308
dts: intel_s1000: update SRAM size to 4MB
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Intel S1000 has 4MB of internal memory.
In DTS it was defined as 3MB and is now updated to 4MB.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-09 20:32:13 -05:00
c15774bfa3
dts: intel_s1000: fix warning about leading "0x"
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This removes the prefix "0x" for sram0 to fix a warning.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 17:52:45 -04:00
6e240da26f
dts: Use new DT_SIZE_{K,M} macros
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Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere. We also have DT_SIZE_M, so use that in a few
places as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-09-15 09:23:07 -05:00
e5b0e9ac07
DTS: interrupt controller: Define IRQ priorities for CAVS & DW ICTL
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IRQ priorities for CAVS and DW were previously defined in Kconfig.
They are now defined via DTS and removed from Kconfig.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-06-11 17:27:58 -04:00
76676651f4
dts: intel_s1000: Enable generating IRQ priority.
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patch enable generating IRQ priority for designware
interrupt controller used in intel_s1000
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 09:30:14 -04:00
6701d44967
dts: xtensa: Fix build error due to dts changes for ns16550 driver.
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patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 08:51:59 -04:00
7be3236ca4
dts: interrupt_controller: Add dts support for DesignWare controller
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Add dts support for multilevel DW interrupt controller
Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
9ee4929d56
dts: i2c: Add dts support for i2c
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Change-Id: I9104f5230a4efbf1b6979e146e7ea73a76891947
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
97f721d928
dts: xtensa: Add device tree support for xtensa
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Change-Id: I309bc50c6b575caa84fbc7ab98cc9890771b4274
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Sathish Kuttan