Commit Graph

25 Commits

Author SHA1 Message Date
Anas Nashif fe051a9055 cleanup: include/: move flash.h to drivers/flash.h
move flash.h to drivers/flash.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Kumar Gala a2693975d7 dts: Convert from DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-14 08:02:15 -05:00
Anas Nashif 4c32258606 style: add braces around if/while statements
Per guidelines, all statements should have braces around them. We do not
have a CI check for this, so a few went in unnoticed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-06 15:20:21 +02:00
Erwan Gouriou 51033a5814 drivers/flash: stm32wb: Add HSEM
Add HSEM for Flash access since shared between 2 cores.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-03 09:38:19 -04:00
Erwan Gouriou d777413b19 drivers/flash: stm32wb: Add driver for stm32wb
Add flash driver for stm32wb

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-03 09:38:19 -04:00
Erwan Gouriou f3832a399e drivers/flash: stm32f3/stm32f1: define flash registers as volatile
On STM32F3 devices, a trick was required for normal use of registers.
This was actually an issue in flash registers defintions which should
be defined as volatile.
Fix this and additionaly, fix definition for STM32F1 which was also
lacking the volatile instruction.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-15 06:43:24 -05:00
Erwan Gouriou 82403f68e2 drivers/flash: Move STM32F3 to generic STM32 series driver
A common driver is shared between stm32 chips, which was not the case
for stm32f3 series. As a consequence stm32f3 was not maintained
equally and was missing features such as flash layout or dts based
configuration.
Besides, drivers had some flows such as wrong bus clock and
missing HSI clock activation which lead to issues on boards not
using HSI as main clock.
As a consequence this commit moves stm32f3 series flash driver to
common stm32 flash drivers.

Fixes #4197

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Kumar Gala f6c7e9a997 flash: flash_stm32: Convert FLASH_WRITE_BLOCK_SIZE to DT_
Convert generic FLASH_WRITE_BLOCK_SIZE to driver specific generated
define DT_SOC_NV_FLASH_0_WRITE_BLOCK_SIZE.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-08 22:39:07 -06:00
Aurelien Jarno 6752b5df3f drivers: flash: add driver for STM32F7x series
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
Aurelien Jarno 48d1fbb352 drivers: flash: stm32: pass offset and len to flash_stm32_flush_caches
On SoC families using a Cortex-M7, it is possible to flush only specific
cache lines. Therefore pass the offset and len so that the flush can be
done with more granularity.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
Aurelien Jarno 123b832a02 drivers: flash: stm32: don't flush i-cache after an erase
In general synchronisation between memory and the instruction cache
should be done explicitly, for example this is how it is done for RAM.
It is also done that way for flash writes in the current STM32 flash
driver.

However in case of flash erases, the current STM32 flash driver flushes
the i-cache. It probably doesn't make a big difference for the
Cortex-M3/M4 families as the cache is very small. That said it might
have bigger impact on families based on Cortex-M7 as it has between 4KB
and 16KB of i-cache, that will be added latter in this patch serie.

This patch therefore remove the i-cache flush in
flash_stm32_flush_caches.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
Aurelien Jarno 551f9c38b8 drivers: flash: stm32: always define flash_stm32_flush_caches
This reduces the amount of #ifdef and keep all of them at the same
place. The empty function is then optimized-out by the compiler.

At the same time change the negative test by a positive one to simplify
adding new entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
Aurelien Jarno 8e356dbc88 drivers: flash: stm32: improve timeout handling
The timeout handling in the STM32 flash driver is currently a counter
in the busy check loop. This doesn't scale well across the whole STM32
family:
- The duration of the loop depends on the CPU speed, the activation of
  caches.
- The duration of the longest flash operation (a sector erase as the
  driver doesn't support mass erase) can varies a lot mostly depending
  on the sector size, 2K on F0 and L4 families or 128K on the F4 family.

In addition the timeout can change depending if the writing thread is
prempted or not.

Fix that by defining a timeout in ms depending on the family, and using
k_uptime_get to get a precise measurement of the time.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
Erwan Gouriou 9062e97a45 drivers: stm32: check clock_control_on return value
Check clock_control_on return value now that it is checking appropriate
bus is used in the request.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-07 11:31:48 -05:00
Andrzej Głąbek 20202902f2 dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig
These changes were obtained by running a script  created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:

1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
   #define X Y)
3. Check if that name is also the name of a Kconfig option
   3.a If it is, then do nothing
   3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
       has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
   (.c, .h, .ld)

Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.

Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Mark Ruvald Pedersen d67096da05 portability: Avoid void* arithmetics which is a GNU extension
Under GNU C, sizeof(void) = 1. This commit merely makes it explicit u8.

Pointer arithmetics over void types is:
 * A GNU C extension
 * Not supported by Clang
 * Illegal across all ISO C standards

See also: https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html

Signed-off-by: Mark Ruvald Pedersen <mped@oticon.com>
2018-09-28 07:57:28 +05:30
Kumar Gala dc98605f4a drivers: flash: stm32: Convert to use device tree
Convert STM32 flash drivers to use device tree to get the flash
controller name and base address.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-26 09:25:57 -06:00
Erwan Gouriou 5ef0019a24 drivers: flash: stm32: get write block size from device tree
In flash driver init, write_block_size could be initialized
with FLASH_WRITE_BLOCK_SIZE which is generated from device
tree parsing (dts property: "write-block-size")
Fixes #5305
If not defined, generate a compilation error.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-01-19 12:16:00 -06:00
Neil Armstrong 32cb3f0220 flash: stm32: add support for STM32F0 flash controller
Add the STM32F0 Embedded Flash support in the flash_stm32 driver
interface.
The STM32F0 has a particularity or use the HSI as clock source
for the flash controller interface, so this clock must be
enabled directly in the case HSE or another clock is used by
the system clock.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Sebastian Bøe b7eaeb9f0a cleanup: Use quote include instead of system include
When the header file is located in the same directory as the source
file it is better to use a relative quote-include, e.g.

than a system include like

Avoiding the use of system includes in these cases is beneficial
because;

* The source code will be easier to build because there will be fewer
system include paths.

* It is easier for a user to determine where a quote-include header
  file is located than where a system include is located.

* You are less likely to encounter aliasing issues if the list of
  system include paths is minimized.

Authors:
Anas Nashif
Sebastian Bøe

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-28 07:11:53 -04:00
Andrzej Puzdrowski 296a355af5 drivers: flash: Add write-block-size values for SoCs
Write-block-size values were filled for nRF5, STM32, QMSI, MCUX and
w25qxxdv devices.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2017-10-11 11:19:15 -05:00
Marti Bolivar 32482e9cb8 flash: stm32: stm32f4: add page layout support
Add flash page layout support for STM32F4 SoCs.

This almost eliminates the need for flash_map.h, except for
STM32F4X_SECTOR_MASK, so delete the file and move the define into the
F4 implementation, to keep things simple.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-09-11 11:41:57 -04:00
Marti Bolivar 4fea6dfe76 flash: stm32: clean up L4/F4 internal API
This is a prep work commit for adding flash page layout support.

The internal flash APIs for STM32 on L4 and F4 are a bit
inconsistent. Some routines take a pointer to the private data, others
don't. Those that do take it as a last argument instead of a
first. Additionally, some APIs are declared in flash_stm32.h that
aren't ever used by the family-specific files.

Clean this up by making everything take a struct device*, and marking
routines static in the common driver code when possible.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-09-11 11:41:57 -04:00
Michel Jaouen e9153979f0 flash: stm32: distinguish read/write for flash range valid
L4 write access requires 64 bits alignment
while L4 read access does not require any alignment.
To support specific check according to read/write,erase
a parameter is added to stm32_valid_range.

Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
2017-06-16 16:18:12 -04:00
Neil Armstrong a9183cd518 flash: Rework and add flash device support for STM32L4x SoCs
The STM32L4x SoCs embeds a slightly different embedded flash controller
from the STM32F4x SoCs.

This particular controller has the following properties :
 - Up to 2 512KiB banks divided in 2KiB pages
 - Flash can be accessed in any sizes
 - Flash must be written in 64bit aligned 64bit double-words

The drivers/flash/flash_stm32f4x.c is refactored into a new common
drivers/flash/flash_stm32.c and drivers/flash/flash_stm32l4x.c is
created with the STM32L4x specific functions.

To ease the refactoring and keep common functions, the STM32L4x flash
headers are slightly modified to match the hardware reference naming
and solve compilation issues.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-19 10:06:48 -04:00