Commit Graph

32 Commits

Author SHA1 Message Date
Carlo Caione d6df78e3b0 gen_isr_tables: Cleanup IRQ vector table generation
Under no circumstances the generated IRQ vector table can and should
contain NULL values. This is correctly enforced at generation time by
the gen_isr_tables.py script making the existence of the ISR_WRAPPER
define useless.

The enforced behaviour is:
- When the ISR software table exists defaults to _isr_wrapper
- Otherwise defaults to z_irq_spurious

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-06-24 20:29:20 +02:00
Gerard Marull-Paretas 45776650c2 arch: gen_isr_tables: migrate to <zephyr/...> include prefix
The gen_usr_tables scripts were not updated to make use of the
<zephyr/...> include prefix, fix this.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Yonatan Schachter 7191b64c6f gen_isr_tables: Added check of the IRQ num before accessing the vt
At its current state, the script tries to access the vector table
list without checking first that the index is valid. This can
cause the script to crash without a descriptive message.
The index can be invalid if an IRQ number that is larger than
the maximum number allowed by the SOC is used.
This PR adds a check of that index, that exits with an error
message if the index is invalid.

Fixes #29809

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-01-24 10:12:54 -05:00
Eugeniy Paltsev 14afc02caa isr_tables: adopt _irq_vector_table for using on 64bit architectures
As of today generic _irq_vector_table is used only on 32bit
architectures and 64bit architectures have their own implementation.
Make vectors size adjustable by using uintptr_t instead of uint32_t
for vectors.

The ARCv3 64 bit HS6x processors are going to be first users for
that.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-01-04 16:47:51 -08:00
Torstein Grindvik c02eb30bbf gen_isr_tables: Function ptr instead of (void *)
gen_isr_tables.py generates C-code which initializes a table with
values, and these values are structs with members cast to
(const void *) and (void *), respectively.

The actual struct definition has a member of type (const void *)
and another of type void (*)(const void *).

In order to avoid a large amount of reported issues in Coverity,
cast this to the exact type.

Signed-off-by: Torstein Grindvik <torstein.grindvik@nordicsemi.no>
2020-10-02 18:48:46 +02:00
Tomasz Bursztyka 6df8b3995e irq: Change dynamic API to take a constant parameter
All ISRs are meant to take a const struct device pointer, but to
simplify the change let's just move the parameter to constant and that
should be fine.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Kumar Gala a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Martí Bolívar 6d0896b7ec gen_isr_tables: error improvements
Random readability improvements:

- avoid a stack trace on error by using sys.exit()
- include "error:" in the error() output, for grep
- print conflicting addresses on multiple IRQ registration

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-17 18:28:47 +02:00
Sebastian Bøe 7d3fa1c2c8 gen_isr_tables: Improve error message
Users are reportedly not able to understand how to debug the following
error message from gen_isr_tables:

gen_isr_tables.py: multiple registrations at table_index 8 for irq 8

Debugging issues these kinds of issues is difficult so we need to give
users as much information as possible.

To make it clearer that it could be an abuse of the 'IRQ_CONNECT' API
that is causing the issue we add this to the error message.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2020-01-29 14:21:00 -08:00
Ulf Magnusson 247d40cf55 gen_isr_tables: Fix pylint warning by using isinstance()
Fix this warning, as a preparation for a CI check:

    arch/common/gen_isr_tables.py:167:11: C0123: Using type() instead of
    isinstance() for a typecheck. (unidiomatic-typecheck)

isinstance() has the advantage that it also handles inheritance, though
it doesn't really matter here. It's more common at least.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-08 22:24:45 -04:00
Ulf Magnusson 0d39a10fbb scripts: Fix random typo'd whitespace
Reported by pylint's 'bad-whitespace' warning.

Not gonna enable this warning in the CI check, because it flags stuff
like deliberately aligning assignments and gets too cultish. Just a
cleanup pass.

For whatever reason, the common convention in Python is to skip spaces
around '=' when passing keyword arguments and giving default arguments:

    f(x=3, y=4)
    def f(x, y=8):
        ...

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-07 07:54:17 -04:00
Augusto Hack 0296938c9f arch: common: gen_isr_tables table size check
Added simple and fairly conservative sanity check for interrupt table
size

Signed-off-by: Augusto Hack <me@hak.cx>
2019-06-17 17:03:02 -07:00
Nicolas Pitre 9bd9b7586d Kconfig: introduce CONFIG_64BIT
This is the generic symbol to select or otherwise test for when 64-bit
compilation is desired. Two trivial usages of this symbol are also
included.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-07 17:48:47 -04:00
Ulf Magnusson 12ba9dfa52 scripts: Remove unused variables in all Python scripts
Discovered with pylint3.

Use the placeholder name '_' for unproblematic unused variables. It's
what I'm used to, and pylint knows not to flag it.

Python tip:

    for i in range(n):
        some_list.append(0)

can be replaced with

    some_list += n*[0]

Similarly, 3*'\t' gives '\t\t\t'.

(Relevant here because pylint flagged the loop index as unused.)

To do integer division in Python 3, use // instead of /.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-28 11:06:20 -05:00
Ulf Magnusson ba312fe844 scripts: Remove unnecessary () around if/while conditions in Python
Not needed in Python. Detected by check C0325 in pylint3.

Also replace an

  if len(tag):

with just

  if tag:

Empty strings, byte strings, lists, etc., are falsy in Python.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:59:59 -05:00
Ulf Magnusson 5c8fd84d12 scripts: Remove extra trailing newlines from Python scripts
Fixing all instances so that it can be flagged in a pylint CI check
later.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:53:08 -05:00
Patrik Flykt 4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Rajavardhan Gundi a23161e7fe gen_isr_tables: Fix _sw_isr_table generation for multi-level IRQs
The commit 77cb942a97 broke the generation of sw_isr_table for
multi-level IRQs. This patch fixes it.

Fixes #13082.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2019-02-06 10:13:25 -05:00
Andrew Boie 77cb942a97 gen_isr_tables: error out on duplicate irqs
It's incorrect behavior to call IRQ_CONNECT() on the
same IRQ line more than once, but only x86 was catching
this.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-04 16:34:35 -05:00
Daniel Leung 259b418b98 gen_isr_tables: fix typo for 3rd level INTR config symbol
The script looks for CONFIG_3RD_LEVEL_INTR_xx_OFFSET while
the config is actually CONFIG_3RD_LVL_INTR_xx_OFFSET.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-01-25 17:36:18 -05:00
Marti Bolivar 0aa87e15bb drivers: interrupt_controller: multi-level improvements
Some extensions to the multi-level interrupt controller are required
to support SoCs with more than four level 2 interrupt "aggregators".

Extend existing support to allow at most 8 level 2 or level 3
aggregators. Use Kconfig macro templates to cut down on boilerplate.
Try to clarify some aspects of the Kconfig help while we're at it, and
change the type of options which count things or are table offsets
from "hex" to "int", so that the generated .config is easier to read.

Finally, make some improvements to gen_isr_tables.py while we are
here. In particular, move some assignments around to cut down on
duplicated work, don't check for symbols we know must exist, and
improve the debug logging output's readability.

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Michael Scott 36b93e121f gen_isr_tables: remove hard-coded max IRQ value of 32
In the MULTI_LEVEL_INTERRUPTS Kconfig we have a symbol for defining
the maximum IRQ per aggregator: MAX_IRQ_PER_AGGREGATOR

Instead of using a hard-coded value of 32 max irq per level,
let's use the value of MAX_IRQ_PER_AGGREGATOR

Signed-off-by: Michael Scott <mike@foundries.io>
2018-11-14 21:14:14 -05:00
Michael Scott 28fe29dd36 gen_isr_tables: fix check for CONFIG_3RD_LEVEL_INTERRUPTS
If CONFIG_3RD_LEVEL_INTERRUPTS is not enabled then we see the following
error during sw_isr_table generation:
Traceback (most recent call last):
  File "zephyr/arch/common/gen_isr_tables.py", line 291, in <module>
    main()
  File "zephyr/arch/common/gen_isr_tables.py", line 199, in main
    if syms["CONFIG_3RD_LEVEL_INTERRUPTS"]:
KeyError: 'CONFIG_3RD_LEVEL_INTERRUPTS'
ninja: build stopped: subcommand failed.

Fix the logic to look for the symbol instead of referencing it.

Signed-off-by: Michael Scott <mike@foundries.io>
2018-11-14 21:14:14 -05:00
Sebastian Bøe a1e806bf44 gen_isr_tables: Delete the dead code accompanying .intList.num_isrs
intList has been populated with the number of isrs, aka interrupts,
but nothing has not been using this information so we drop it and
everything used to construct it.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-25 12:54:49 -07:00
Sebastian Bøe aed0b6c4bd isr_tables: Simplify how the sw_irq_handler function is used
This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

It is equivalent to the simplification that was done with
_irq_spurious here:
https://github.com/zephyrproject-rtos/zephyr/pull/7574

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-20 15:39:29 -04:00
Sebastian Bøe 8f321b48ac isr_tables: Simplify how the spurious irq function address is found
Instead of finding the address of the spurious irq function in the
intList section we now rely on the linker to find the address in the
_irq_spurious symbol.

This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

In this specific case it makes the generated code 'irq_tables.c'
easier to read as we replace magic numbers with the &_irq_spurious
token.

Also, the path through the build system that _irq_spurious makes is
much shorter, so it is much easier for a user to understand how it is
used.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-19 13:46:35 -07:00
Rajavardhan Gundi 1e6adba9ef drivers/interrupt_controller: Introduce multi-level interrupt support
In a scenario where a platform harbours multiple interrupts to the
extent the core cannot support it, an interrupt controller is added
as an additional level of interrupt. It typically combines several
sources of interrupt into one line that is then routed to the parent
controller.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-02-06 22:39:05 -05:00
Sebastian Bøe 74174809da gen_isr_tables: Minor refactoring
Minor refactor to gen_isr_tables.py; "if not" is difficult to read.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-04 08:55:26 -05:00
Anas Nashif 397d29db42 linker: move all linker headers to include/linker
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-18 09:24:04 -05:00
Kumar Gala bf53ebf2c8 arch: convert to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  There are few places we dont convert over to the new
types because of compatiability with ext/HALs or for ease of transition
at this point.  Fixup a few of the PRI formatters so we build with newlib.

Jira: ZEP-2051

Change-Id: I7d2d3697cad04f20aaa8f6e77228f502cd9c8286
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 12:08:12 +00:00
Andrew Boie 3944d8313e gen_isr_tables: apply offset to irq parameter
The interrupts would be placed at incorrect offsets on systems where
some interrupt vectors are reserved for exceptions, such as ARC.

Change-Id: I5b1f00eb9e8aecb84ae66e3d0461a734ffb5fbe6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-15 04:49:19 +00:00
Andrew Boie 1927b3d020 gen_isr_tables: New static interrupt build mechanism
This is a new mechanism for generating interrupt tables which will
be useful on many architectures. It replaces the old linker-based
mechanism for creating these tables and has a couple advantages:

 1) It is now possible to use enums as the IRQ line argument to
    IRQ_CONNECT(), which should ease CMSIS integration.
 2) The vector table itself is now generated, which lets us place
    interrupts directly into the vector table without having to
    hard-code them. This is a feature we have long enjoyed on x86
    and will enable 'direct' interrupts.
 3) More code is common, requiring less arch-specific code to
    support.

This patch introduces the common code for this mechanism. Follow-up
patches will enable it on various arches.

Issue: ZEP-1038, ZEP-1165
Change-Id: I9acd6e0de8b438fa9293f2e00563628f7510168a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-11 01:27:58 +00:00