Commit Graph

10 Commits

Author SHA1 Message Date
Kumar Gala a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Daniel Leung b935903543 soc: mec1501: modifies interrupt restoration after deep sleep
z_power_soc_deep_sleep() is called with interrupt locked already
so restoring BASEPRI is pointless here, as it would only allow
exceptions afterwards. The situation is complicated by the fact
that kernel/idle.c:idle() only locks interrupt without unlocking
which means the BASEBRI at entry of z_power_soc_deep_sleep() is
already set to allow exceptions only but not lower priority
interrupts like timer. So when, e.g. timer, interrupt fires,
the SoC would come out of deep sleep but the waking interrupts
are never delivered since they are masked, and idle() will try
to sleep again. And now it gets into a loop of going into deep
sleep briefly and waking up immediately and it goes on and on.
The solution is not to restore BASEPRI and simply leave it at
zero. This is a workaround as a proper fix would involve
invasion changes to the PM subsystem.

Also, _sys_pm_power_state_exit_post_ops() is not being called
when deep sleep is involved, so PRIMASK needs to be reset
after coming out of deep sleep.

Fixes #23274

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-10 07:48:33 -04:00
Daniel Leung 4700c93f3c soc: mec1501: wait for PLL to lock coming out of deep sleep
The 48MHz PLL on MEC1501 is shut off during deep sleep (i.e. heavy
sleep in datasheet). When coming out of deep sleep, this PLL needs
about 3ms to lock. Most peripherals are using this PLL as clock
source and timing would be off before PLL is locked. Example of
this is seen on serial console where garbage characters are sent
as the UART block is not pushing characters out at the configured
baud rate. This likely affects all other peripherals such as I2C
and eSPI. Luckily, there is a register to indicate whether the PLL
is ready. So spin on it when coming out of deep sleep.

Fixes #23207

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-11 10:13:41 -04:00
Ulf Magnusson cf89ba33ea global: Fix up leading/trailing blank lines in files
To make the updated test in
https://github.com/zephyrproject-rtos/ci-tools/pull/121 clean, though it
only checks modified files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-27 17:41:55 -06:00
Jose Alberto Meza 3783c83b25 soc: arm: microchip: Allow to support only light sleep
Make sure light sleep hook function is compile when needed
This solves linking error for shippable test that only enable
light sleep.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-03 12:04:00 -08:00
Anas Nashif 3765e46a40 soc: mec1501: fix build failure
When CONFIG_SYS_POWER_DEEP_SLEEP_STATES is not set, we have an unused
function that causes a build failure.
Enclose that function in the #ifdef.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-12-11 13:09:52 -06:00
Kumar Gala 82e05450ca include: Fix use of <power.h> -> <power/power.h>
Fix #include <power.h> as it has been deprecated and
should be #include <power/power.h>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-12-10 08:39:37 -05:00
Kumar Gala cd0f8d5c4f include: Fix use of <sys_io.h> -> <sys/sys_io.h>
Fix #include <sys_io.h> as it has been deprecated and
should be #include <sys/sys_io.h>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-12-10 08:39:37 -05:00
Kumar Gala 24ae1b1aa7 include: Fix use of <misc/FOO.h> -> <sys/FOO.h>
Fix #include <misc/FOO.h> as misc/FOO.h has been deprecated and
should be #include <sys/FOO.h>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-12-10 08:39:37 -05:00
Scott Worley 60915c884f soc : mec1501 : Deep and light sleep example
Created MEC1501 deep and light sleep example for MCHP MEC1501.
Modifications were made to SoC, board, timer, and hello world
sample program. Power management split into SoC power
implementing the interface and device power for device specific
logic.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-12-09 11:57:03 -05:00