Commit Graph

406 Commits

Author SHA1 Message Date
Anas Nashif 49b36ead95 drivers: add mising braces to single line if statements
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 11:00:45 -04:00
Richard Yim 1b4e5b8d35 ITE drivers/pwm: fix target frequency below 324Hz on it8xxx2
after the second times will not operating in correct output frequency.

Signed-off-by: Richard Yim <yimjiajun@icloud.com>
2022-07-06 11:04:02 +02:00
Lucas Tamborrino 1333787d8f drivers: pwm: refactor esp32 pwm ledc driver
Use hal function for low level access.
Use device tree for hardware configuration.
Support for esp32s2.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-06-29 14:48:25 +00:00
Lucas Tamborrino 02675bbc80 dts: esp32: full ledc configuration in binding
This commit moves the hardware configuration for ledc
peripheral to the device-tree instead of Kconfig.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-06-29 14:48:25 +00:00
Gerard Marull-Paretas 88f9039747 drivers: pwm: b91: fix non-local headers include
pwm.h and clock.h are HAL headers, so use <> instead of "" (for locals).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-28 16:17:46 +02:00
Gerard Marull-Paretas 4324974281 drivers: pwm: b91: fix multi-instance support
Driver was in a weird state: it made use of
DT_INST_FOREACH_STATUS_OKAY, however, it had an assertion to support a
single instance and used instance 0 properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-28 16:17:46 +02:00
Gerard Marull-Paretas 4946a15f15 soc: arm: gigadevice: use common API headers
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.

This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-06-22 18:41:19 +09:00
Lucas Tamborrino 9f77cc5a89 drivers: pwm: fix esp32 pwm led driver
Fix mapping between channel and gpio.

Remove obsolete functions.

Closes #46167

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-06-05 14:49:12 +02:00
Fabio Baltieri e24314f10f include: add more missing zephyr/ prefixes
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-05-27 15:20:27 -07:00
Michael Schmitz 043a31a1c6 drivers: pwm: esp32: rename internal channel to avoid redeclaration
Unifying the method signature introduced a redeclaration of variables,
fixes redeclaration of variables by renaming the inner ones

Signed-off-by: Michael Schmitz <michaelschmitz@live.de>
2022-05-25 14:21:12 +02:00
Fabio Baltieri 69a13bbb5d drivers: pwm_nrfx: fix incoherent config struct name
Fix the instance config structure name so that it's coherent with the
data one (missing underscore after the instance idx).

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-05-20 19:22:20 -07:00
Daniel DeGrasse ddee8d7f4e drivers: pwm_imx: add pin control support
Add pin control support to pwm_imx driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-12 16:57:17 -05:00
Mulin Chao 8f65bdabab drivers: pwm: add pinctrl driver support
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in pwm driver.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-05-12 14:24:03 -05:00
Ruibin Chang f3204b7326 ITE drivers/pwm: don't divide-by-zero
Make sure cxcprs isn't zero, or we will have
divide-by-zero on calculating actual_freq.

Test:
1.tests/drivers/pwm/pwm_api pattern
2.GPA0(pwm0) output 79201Hz, 324Hz, 100Hz, 1Hz waveform

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2022-05-11 10:49:13 +02:00
Gerard Marull-Paretas fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Tim Lin 8ecd5bb2f7 ITE: drivers/pwm: Use pinctrl instead of pinmux driver
Use pinctrl instead of pinmux driver.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-05-06 11:32:40 +02:00
Georgij Cernysiov 1520820bff drivers: pwm: stm32: fix PWM channel disabling
Move period and pulse computation to right before
the channel enable code.

That fixes the inability to disable the channel by
providing the period of 0.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-05 14:36:56 -05:00
Henrik Brix Andersen 64c9fadc7c drivers: pwm: rv32m1: tpm: add pinctrl support
Add pinctrl support to the OpenISA RV32M1 TPM PWM driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Michal Sieron 2485c0232b pwm: pwm_litex: Use LiteX HAL
Removed register sizes from config struct, as they are known.
This allowed to remove driver specific function reading from CSR and use
`litex_write*` functions from LiteX HAL.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
2022-04-29 16:11:53 +02:00
Gerard Marull-Paretas 04836af2a9 drivers: pwm: shell: fix pwm_set calls
PWM has a single set function now, macros like PWM_USEC() can be used to
specify other units than nanoseconds. This conversion was missed during
API updates.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 09:08:41 -04:00
Gerard Marull-Paretas 61f2ed8356 drivers: pwm: shell: fix struct variable name
The pwm field in struct args_index was missed when pwm was renamed to
channel in all drivers. As a result, the PWM shell could no longer be
built.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 09:08:41 -04:00
Gerard Marull-Paretas 10ee44c94b drivers/samples/tests: remove usage of deprecated PWM APIs
Use the new API calls that remove pin naming.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Gerard Marull-Paretas e2852ef985 drivers: pwm: use new API naming (no pin)
Use the API names without `_pin`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Gerard Marull-Paretas 95b56cdffd drivers: pwm: remove _pin from API calls
In a first place, the PWM API operates on "channels", not "pins". While
the API calls could have been changed by _channel, this patch takes the
approach of just dropping _pin. The main reason is that all API calls
operate by definition on a channel basis, so it is a bit redundant to
make this part of the name. Because the `_dt` variants of the calls are
going to be introduced soon, the change to `_channels` + `_dt` would
make API function names quite long.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Gerard Marull-Paretas fbf73334f3 drivers: pwm: make all drivers use channel variable name
The variable indicating the PWM channel is now names "channel" instead
of "pwm", adjust all drivers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Gerard Marull-Paretas 6f39b08343 drivers: pwm: gecko: fix access to timer register
The timer registers are accessible via the device config field, driver
code was wrong in one case (pwm is the variable indicating PWM channel).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Gerard Marull-Paretas aa37dedcaf drivers: pwm: ite_it8xxx2: remove wrong ARG_UNUSED
The pwm arg is used in the function, so placing ARG_UNUSED is wrong.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Gerard Marull-Paretas c11516ae90 drivers: pwm: ite_it8xxx2: add missing braces
Multiple if/else blocks had missing braces, add them as this violates
Zephyr coding guidelines.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Andrzej Głąbek 5609bc48dd drivers: pwm_nrf5_sw: Add support for PWM_POLARITY_INVERTED flag
Add support for inverting of PWM channel outputs in the pwm_nrf5_sw
driver by properly handling the `PWM_POLARITY_INVERTED` flag.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-22 09:43:26 +02:00
Andrzej Głąbek c23a449bfb drivers: pwm_nrf5_sw: Treat `pwm` parameter as PWM channel, not SoC pin
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-sw-pwm" binding
and with related `DT_PWMS_*` macros.
The change described above requires also providing a way to specify
SoC pins that are to be assigned to the PWM channels. Hence, the commit
introduces in the "nordic,nrf-sw-pwm" binding the `channel-gpios`
property that replaces the `channel-count` one.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-22 09:43:26 +02:00
Andrzej Głąbek e7a075f460 drivers: pwm_nrfx: Add support for PWM_POLARITY_INVERTED flag
Add support for inverting of PWM channel outputs in the pwm_nrfx driver
by properly handling the `PWM_POLARITY_INVERTED` flag.
The dts properties that were used so far for inverting of the outputs
("nordic,invert" and "chX-inverted") are kept as they are needed for
setting of the initial polarity, i.e. for setting the inactive state
of the outputs before any PWM signal generation is requested for them.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-22 09:43:26 +02:00
Andrzej Głąbek dbdbc79b36 drivers: pwm_nrfx: Treat `pwm` parameter as PWM channel, not SoC pin
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-pwm" binding
and with related `DT_PWMS_*` macros.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-22 09:43:26 +02:00
Georgij Cernysiov 3650664875 drivers: pwm: stm32: support counter modes
Adds support for different timer counter modes.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-04-15 11:59:16 -07:00
Georgij Cernysiov 366bf47c27 drivers: pwm: stm32: remove obvious comments
Removes obvious comments from the PWM
configuration struct.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-04-15 11:59:16 -07:00
Hu Zhenyu 2824696d11 dts: mec172xevb_assy6906: Add pwm-0 alias to mec172xevb dts file
Enable tests/drivers/pwm/pwm_api test case on both west and twister

Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
2022-04-13 12:02:46 -05:00
Andrzej Głąbek 42275c263b drivers: pwm_nrf5_sw: Use the PPI FORK feature when available
This way, when RTC is used as the generator, one PPI channel per each
configured PWM channel can be saved.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-12 09:51:53 +02:00
Andrzej Głąbek d683ad0300 drivers: pwm_nrf5_sw: Correctly use all channels provided by generator
Use compare channel 0 in the generator for handling the PWM period.
This way all other channels offered by the generator can be easily
used for handling pulses on particular PWM channels.
So far the driver allowed to configure more than 3 channels for certain
TIMER instances, but since channel 3 was always used for the period,
the generation could not work in such setups.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-12 09:51:53 +02:00
Andrzej Głąbek f73618906d drivers: pwm_nrf5_sw: Correctly use allocated GPIOTE channels
The driver improperly uses the PWM channel index to reference
the GPIOTE channel to be used for the PWM signal generation.
Consequently, the PWM signal on a given channel can be correctly
generated only if both those indexes are by chance the same.
Fix this by switching to use the stored index of the actually
allocated GPIOTE channel.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-12 09:51:53 +02:00
Gerard Marull-Paretas 8ff797b850 drivers: pwm: litex: remove redundant config 'helper'
All these sort of helpers were removed from tree a while ago, this one
was missed as it uses a custom name.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Gerard Marull-Paretas e3fde6b01a drivers: pwm: sifive: remove redundant checks
If dev was null, caller would have faulted before since dev->api needs
to be accessed before reaching this point. Also, a well-defined device
will never have a NULL dev->config.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Gerard Marull-Paretas ccc12be0a5 drivers: pwm: return -ENOTSUP if inactive level is not supported
The API spec states that calling pin_set() with period set to 0 is
equivalent to set the PWM channel to an inactive level. Some drivers
treat this input as invalid (-EINVAL), however, it's an unsupported
feature. Maybe it's due to copy&paste effect? This changes error message
to be clear and changes return value to -ENOTSUP for this case.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Gerard Marull-Paretas 0c908706fb drivers: pwm: remove duplicated pulse > period checks
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Daniel DeGrasse 415b2bdac0 drivers: pwm: pwm_mcux_sctimer: Add pinctrl support for lpc pwm
add pinctrl support for lpc sctimer pwm driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Shawn Nematbakhsh c74526919d soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.

This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2022-04-05 12:00:03 +02:00
Andrzej Głąbek 586e26e8fc soc: nrf: Use data from DTS to populate HAS_HW_NRF_* Kconfig options
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-02 15:14:38 +02:00
Francois Ramu 90d1644a10 drivers: pwm: stm32 can initialize the PWM complementary output
If the dts defines the PWM complementary output, then the OCN
must be init in place of the OC state and polarity.
This is an exclusive setting for this pin.
The channel in LL_TIM_OC_SetPolarity can be the complementary one.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-03-31 10:28:47 +02:00
Daniel DeGrasse dbb4ad8eb1 drivers: pwm: enable pinctrl for nxp imx_pwm driver
Enable pinctrl for nxp imx_pwm driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-25 15:47:54 -05:00
Gerson Fernando Budke 8c51ad6c6f drivers: pwm: Add sam0 support to pinctrl
This add support to pinctrl at Atmel sam0 tcc pwm driver. It updates
all boards with new pinctrl groups format and drop pinmux entries.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-24 15:45:37 -07:00
Gerson Fernando Budke dc172849fa drivers: pwm: Update sam pwm driver to use pinctrl
This update Atmel sam pwm driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove all remaining manual pinmux at board level.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-24 15:45:37 -07:00
Jordan Yates c064006ecc drivers: pwm: test driver
Add a dummy driver for the `vnd,pwm` compatible to allow compilation of
drivers utilising PWM when running "build_all" tests.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-03-24 12:56:28 +01:00