Commit Graph

312 Commits

Author SHA1 Message Date
Derek Hageman d68666fc08 drivers: spi: sam0: Implement DMA async API
This adds support for the async API for SAM0 SERCOM SPI using
DMA to drive the device.  This implementation does the reload
for both transmit and receive in the receive DMA handler.
Doing this simplifies the implementation but means that the
transmit drains completely, resulting in the SPI clock pausing
between buffers while both are reloaded in the receive handler.

Tested with tests/drivers/spi/spi_loopback and several simple
programs monitored with a logic analyzer.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-05-01 10:27:42 -04:00
Scott Worley 37df256658 soc : arm : microchip_mec Add Microchip MEC1501 SoC
Initial support for Microchip MEC1501 series is added to the tree.
Additional support for UART is also included. This SoC supports
two operational modes for interrupts (Direct and Aggregated). For
this commit, the direct capable interrupt are configured in direct
mode.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-30 14:08:23 -07:00
Andrew Fernandes e96673dca7 drivers: spi: nrfx: allow enabling DMA with the nRF52832 despite PAN 58
Add a Kconfig option to enable DMA for SPI with SOC_NRF52832 as long as
it being disabled due to Product Anomaly Notice (PAN) 58 is explicitly
overridden. This allows the SPIM driver to be enabled for the nRF52832
SoC for situations where PAN 58 is not a problem.

Signed-off-by: Andrew Fernandes <andrew@fernandes.org>
2019-04-28 13:29:46 -04:00
Benjamin Valentin 86bd319d1f soc: sam0: Make init code common between all samd2x SoCs
The init routines are the same for SAMD20, SAMD21 and SAMR21, so
move them into common/ to not have three copies of the same code.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-04-28 13:25:35 -04:00
Benjamin Valentin 9f69878633 soc: sam0: enable RTC for samd21, samr21
The Atmel SAMD21 (and therefore also the SAMR21) comes with the same
RTC peripheral as the Atmel SAMD20.

Enable it in dts_fixup.h and enable it in the dts for samr21_xpro.

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2019-04-28 13:25:35 -04:00
Benjamin Valentin 770233dd10 soc: atmel: add SAMR21
Adds Atmel SAMR21 soc which is based on SAMD21, but with a AT86RF233
radio connected internally via SPI.

The AT86RF233 is not yet supprted by Zephyr at this point.

This code is very much copy & paste from atmel_sam0/samd21

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2019-04-28 13:25:35 -04:00
Loic Poulain e5609997e0 soc: nxp_imx: mimxrt1064_evk: Add I2C support
I2C1 is routed to J24 Arduino interface (D14/I2C_SDA, D15/I2C_SCL).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-04-26 03:48:07 -07:00
Yaël Boutreux b4b7020b03 gpio: Add stm32mp157c_dk2 board support
Add support for stm32mp1x GPIO with Zephyr GPIO driver

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-26 02:56:20 -07:00
Yaël Boutreux aca4b075f1 clock_control: Add stm32mp157c_dk2 board support
Add support for stm32mp1x RCC with Zephyr clock_control driver

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-26 02:56:20 -07:00
Ioannis Glaropoulos 894eca5e4f soc: arm: rename CPU_HAS_SYSTICK to CPU_CORTEX_M_HAS_SYSTICK
This commit renames the symbol CPU_HAS_SYSTICK to
CPU_CORTEX_M_HAS_SYSTICK, to look similar to all
other CPU_CORTEX_M_HAS_ options, and moves the
K-config symbol definition from arm/core/Kconfig to
arm/core/cortex_m/Kconfig.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Ioannis Glaropoulos ccf90fd9c2 soc: arm: select CPU_HAS_SYSTICK in ARCH Kconfig
ARM SysTick timer is implemented by default in ARMv7-M
and Mainline ARMv8-M processors, so we include the
corresponding Kconfig symbol in arch/arm/core/cortex-M/Kconfig
and remove the selections from the Cortex-M SOCs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Ioannis Glaropoulos ce0dcea4b1 soc: arm: remove redundant CPU_CORTEX_M selection
CPU_CORTEX_M does not need to be selected by Kconfig
symbols that already select a CORTEX_M variant.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Habib Zaid 32367c0dfc soc: arm: stm32: Updated SRAM Region Definitions
This updates the SRAM region definition for stm32

Signed-off-by: Habib Zaid <habibzaid@gmail.com>
2019-04-24 11:06:41 -05:00
Manivannan Sadhasivam b31adf2d33 drivers: i2c: Add STM32L1X I2C support
Add I2C support for STM32L1X SoC series based on I2C_STM32_V1
driver.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 0525019b23 drivers: interrupt_controller: Add STM32L1X EXTI support
Add EXTI support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 1eb6177e9b drivers: gpio: Add STM32L1X GPIO support
Add GPIO driver support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 43e56a93bb soc: arm: stm32: stm32l1: Add UART support
Add UART support for STM32L1 series SoCs.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam c8b0a8d41f drivers: clock_control: Add STM32L1X clock support
Add clock support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 92ac6d8fc6 soc: arm: st_stm32: Add STM32L1 SoC series
Add STM32L1 SoC series support with STM32L15XXB as the target
SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Erwan Gouriou 1847426f32 dts/arm/st: Add serial nodes on stm32wb
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou eb51ea00b0 soc/arm/st_stm32: stm32wb: Add gpio support
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou b11289997f drivers/clock_control: Add support to stm32wb series
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou 6347b87e8f soc/arm/st_stm32: Add support for stm32wb soc
Provide basic soc configuration for STM32WB SoCs support in Zephyr.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Arnaud Pouliquen 776671c7eb drivers/interrupt_controller: stm32: add support of stm32mp1
Add support of the stm32mp1 gpio exti.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Arnaud Pouliquen e0afd7e580 soc: stm32: add initial soc support for stm32mp1 family
Add the initial SoC support for the STM32MP1 family. The code was
tested on STM32MP157c, but should work on any STM32MP1XX currently
available.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Ioannis Glaropoulos bb35bb8ad5 soc: arm: sam3x: minor fixes in soc.h and arm_mpu_regions.c
Force soc.h to include the headers generated automatically
by DTS. In addition, force arm_mpu_regions.c to include
misc/slist.h for ARRAY_SIZE() macro. arm_mpu_regions.c
does not need to include soc.h (it is included indirectly
via arm_mpu.h)

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-18 17:43:26 -04:00
Ryan QIAN f44514d1e4 arch: arm: nxp: imxrt1015: add device support
- Add SoC information for RT1015

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2019-04-18 16:11:34 -05:00
Karl Zhang 13dfeba5bd arm: V2M Musca B1: Add Musca B1 SoC and board support
Musca B1 is a Cortex-M33 based SoC.

Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-04-18 13:25:50 -05:00
William Fish cc15b9ced3 soc: nordic_nrf: MPU temperature sensor default
Consistency: nrf51 & 52 SOC set temp sensor as default if SENSOR=y

Signed-off-by: William Fish <william.fish@manulytica.com>
2019-04-18 12:25:51 -04:00
Ulf Magnusson 7fdb525754 kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.

Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.

Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):

For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-04-18 12:20:49 -04:00
Kwon Tae-young a7199b757d soc: st: add STM32F415RG
This commit adds support for STM32F415RG.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-04-18 11:12:16 -05:00
Alexander Wachter 78714b4ff4 boards: arm: nucleo_f746zg: Activate CAN on nucleo F746zg
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-04-18 09:23:20 -04:00
Ulf Magnusson 9964cf29ac kconfig: Add missing quotes after 'source' and 'menu'
Missing quotes are accepted in some places for compatibility with the C
tools, e.g.

  source no/quotes/Kconfig
  menu Title

It looks broken though. Fix the two places in Zephyr that skip the
quotes. A style warning will be added.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-04-18 08:46:15 -04:00
Georgij Cernysiov 04da64db76 drivers: serial: stm32: dts binding, and fixup for flow control
Allows to enable initial RTS/CTS hardware flow control
in the dts.

Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
2019-04-17 16:09:54 -05:00
Ioannis Glaropoulos 51a563dc7d soc: arm: sam3x: add MPU capability
Add Memory Protection (MPU) capability to the Atmel SAM3X SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-17 15:03:32 -04:00
Josef Gajdusek 29ffcae80c drivers: usb_dc_stm32: Make pin remapping part of the device tree
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.

Also fixes syntax error caused by a missing );.

Signed-off-by: Josef Gajdusek <atx@atx.name>
2019-04-17 09:58:09 -05:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Patrik Flykt fd42bf7443 soc: Rename reserved function names
Rename reserved function names in the soc/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Patrik Flykt 24d71431e9 all: Add 'U' suffix when using unsigned variables
Add a 'U' suffix to values when computing and comparing against
unsigned variables.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-28 17:15:58 -05:00
Piotr Zięcik bd24b31139 Revert "soc: arm: nordic: provide custom busy_wait implementations"
This reverts commit d4b4b99272 as it
introduced unwanted side effect: It moved the k_busy_wait() to other
clock that the one driving system timer and k_cycle_get_32(). As result,
delays created using these interfaces not matched each other.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-03-28 15:09:32 -05:00
Mieszko Mierunski 7700322961 dts: nrf: Add DPPIC to device tree.
Add DPPIC to dts. Add HAS_HW_NRF_DPPIC to nrf91 soc.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-03-28 09:30:57 -04:00
Maureen Helm 5cdbd39e33 soc: nxp_imx: Configure NUM_IRQS independently for each rt soc
Not all i.mx rt socs have the same number of irqs, so move the default
configuration from the soc series level to the individual socs. The
rt1020 hardware reference manual (IMXRT1020RM Rev.1 12/2018) incorrectly
documents 160 irqs (#142-159 reserved), but the soc actually has 142
irqs.

Fixes tests/kernel/gen_isr_table for the mimxrt1020_evk board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-03-26 22:16:47 -04:00
Piotr Mienkowski a3082e49a1 power: modify HAS_STATE_SLEEP_ Kconfig options
Add SYS_POWER_ prefix to HAS_STATE_SLEEP_, HAS_STATE_DEEP_SLEEP_
options to align them with names of power states they control.
Following is a detailed list of string replacements used:
s/HAS_STATE_SLEEP_(\d)/HAS_SYS_POWER_STATE_SLEEP_$1/
s/HAS_STATE_DEEP_SLEEP_(\d)/HAS_SYS_POWER_STATE_DEEP_SLEEP_$1/

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Piotr Mienkowski 17b08ceca5 power: clean up system power managment function names
This commit cleans up names of system power management functions by
assuring that:
- all functions start with 'sys_pm_' prefix
- API functions which should not be exposed to the user start with '_'
- name of the function hints at its purpose

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Piotr Mienkowski 204311d004 power: rename Low Power States to Sleep States
There exists SoCs, e.g. STM32L4, where one of the low power modes
reduces CPU frequency and supply voltage but does not stop the CPU. Such
power modes are currently not supported by Zephyr.

To facilitate adding support for such class of power modes in the future
and to ensure the naming convention makes it clear that the currently
supported power modes stop the CPU this commit renames Low Power States
to Slep States and updates the documentation.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Ulf Magnusson 19626892b5 kconfig: Replace two leftover 'gsource' with 'source'
Plain 'source' is globbing. 'gsource' is a leftover from an older
design, and works as a synonym for 'source'.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:55:35 -05:00
Erwan Gouriou f3832a399e drivers/flash: stm32f3/stm32f1: define flash registers as volatile
On STM32F3 devices, a trick was required for normal use of registers.
This was actually an issue in flash registers defintions which should
be defined as volatile.
Fix this and additionaly, fix definition for STM32F1 which was also
lacking the volatile instruction.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-15 06:43:24 -05:00
Loic Poulain 116dd8e527 dts: arm: nxp: rt106x: Unified OCRAM node
The iMX RT1060 and RT1064 have additional dedicated 512KB on-chip ram.
This OCRAM2 is mapped at 0x20200000, formerly OCRAM1 (flexram) mapping
which is moved to 0x20280000 in order to guarentee global OCRAM memory
continuity regardless OCRAM1 size configuration (256KB by default).

In default configuration, this gives 768KB (512+256) on-chip ram:
0x20200000 to 0x202BFFFF.

OCRAM2:           0x20200000 - 0x2027FFFF
OCRAM1(FlexRam):  0x2028FFFF - 0x202BFFFF

Add this memory region as a single node in the rt1060 device tree.

Note: MPU expects power of two memory region, in case of 768KB, let
the MPU configure 1MB instead.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-03-15 06:40:23 -05:00
Erwan Gouriou 70f95a25f5 soc: stm32f4: fixup: Rename UART generated DT_ defines
On stm32f4 series, uart4 is not an usart, so generated with
'st,stm32-usart' compatible and hence generated defined should be
prefixed with DT_ST_STM32_UART_ rather than DT_ST_STM32_USART.

Fixes #14542

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-15 06:39:37 -05:00
Kumar Gala 4e90103fcb arm: asm: Fix some asm issues when building with clang
The clang ARM assembler is a bit stricter than GNU as, make a few
changes so things build with both

Signed-off-by: Peter Smith <peter.smith@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-03-14 08:01:10 -05:00