Commit Graph

91 Commits

Author SHA1 Message Date
Kumar Gala 9897c3b0dd libc: Move xtensa reentrant syscall impl to common libc-hooks
The xcc specific reentrant syscall implementations are actually useful
for xtensa in general.  So move that code from being specific to
intel_s1000 / xcc into generic newlib/libc-hooks.c.  This is in prep
for the Zephyr SDK dropping -DMISSING_SYSCALL_NAMES which will make
its version of newlib on xtensa match behavior with xcc.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-03 14:57:10 -06:00
Anas Nashif aa14022c8a intel_s1000: various fixes for build errors
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-31 14:51:37 -05:00
Tomasz Bursztyka fb76ddfda3 soc/xtensa: Removing useless USB definitions for Intel s1000
These information are now provided through DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 1925b501a8 soc/xtensa: Configuring the DW USB DT aliases in Intel s1000
These aliases will be used by the DW driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka c82e629fd3 soc/xtensa: Removing useless DMA definitions for intel s1000
These information are now provided through DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 8d10e66371 drivers/interrupt-controller: Make irqs DT configured in DW
DesignWare driver can manage different amount of irqs so let's make it
configurable via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 4b94668f5b drivers/interrupt_controller: Normalize DT aliases consitently for DW
DT_<domain>_DW_<num>_<option> as for SPI, GPIO, DMA etc...

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka f5a9d5d1a5 driver/spi: Make DT aliases consistent for the DW drivers
And apply it on all existing fixups.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 8151a4e253 soc/xtensa: Generate 2 other DW DMA DT aliases from DTS options
2 other DMA instances exist along with the first one.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka df7df5b89a soc/xtensa: Generate DW DMA DT aliases from DTS options
Such aliases are necessary since different instance could be configured
as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Ulf Magnusson 4e85006ba4 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf}
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.

dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.

The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.

Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.

hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-17 17:57:59 +01:00
Ulf Magnusson def1f0e2d5 devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions
The SRAM address and size are currently available as both
DT_SRAM_{BASE_ADDRESS,SIZE} and as CONFIG_SRAM_{BASE_ADDRESS,SIZE} (via
the Kconfig preprocessor).

Use the CONFIG_SRAM_* versions everywhere, and remove generation of the
DT_SRAM_* versions from gen_defines.py.

The Kconfig symbols currently depend on 'ARC || ARM || NIOS2 || X86'.
Not sure why, so I removed it.

It looks like no configuration files set CONFIG_SRAM_* at the moment, so
another option might be to use the DT_* symbols everywhere instead. Some
Kconfig.defconfig.series files add defaults to them though.

Also improve the help texts for CONFIG_SRAM_* to say that they normally
come from devicetree rather than configuration files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-07 17:19:36 +01:00
Daniel Leung e73231f7f0 toolchain: xcc: use Clang if exists
The XCC toolchain may come with Clang front-end depending on
how it's built. Currently, the only SoC/board using XCC is
the intel_s1000_crb and its XCC toolchain comes with Clang
3.9.0 which has a lot better support for C99 and C++11 than
the portion based on GCC 4.2 (which does not even support
C++11). So this change attempts to use the Clang portion
instead of GCC if the Clang executable exists.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung 2a2351b58f soc: intel_s1000: add dummy sys_reboot() for test with XCC
XCC does not seem to handle if(IS_ENABLED()) well which means
XCC would not get rid of code even IS_ENABLED() is false.
In this case, sys_reboot() call in ztest is in this situation
so add a dummy version for ztest only.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung 24b9542eba soc: intel_s1000: fix XCC build error when CONFIG_LOG_MINIMAL=y
During LOG_*() macro expansions, XCC expands everything even though
IS_ENABLED() is used. This resulting in various log*() functions
(e.g. log_0(), log_1(), etc.) being required for linking. However,
when CONFIG_LOG_MINIMAL=y, those functions are not compiled from
the logging subsystem. Therefore, to get past the linking error,
dummy versions are being provided.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung bac0a93d62 soc: intel_s1000: provide dummy version of _gettimeofday_r()
The newlib of XCC requires linking to _gettimeofday_r() which
should have been provided by its own C library, but obviously
isn't. So we need to provide a dummy version to get past
the build error.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung 60db257e69 soc: intel_s1000: add dummy atexit() for Clang++
Add a dummy atexit() function when compiling C++ source files
using Clang++.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Daniel Leung ac4ebe4ffb soc: intel_s1000: move XCC fixes into its own directory
Turns out it's going to have more fixes than just Newlib.
So put them into one directory.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
Ulf Magnusson 984bfae831 global: Remove leading/trailing blank lines in files
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.

Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.

Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 19:17:27 +01:00
Daniel Leung fc7916aeae soc: intel_s1000_crb: fix XCC build error with newlib
The Newlib in the XCC toolchain for intel_s1000_crb has a few
missing functions which are reentrant versions of the one
defined in lib/libc/newlib/libc-hooks.c. So make these call
the correct functions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-12-02 09:58:00 -05:00
Daniel Leung 90dc1e5d7a soc: intel_s1000_crb: fix cmake warning about HAS_*_DW
Both HAS_I2C_DW and HAS_SPI_DW are not valid unless I2C and
SPI are both selected. So make them dependent on the parent
subsystem config.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-12-02 09:58:00 -05:00
Daniel Leung fadeb3eb47 soc: intel_s1000_crb: update LP_SRAM macros
The DT_LP_SRAM_* are aliases to DT_MIMO_SRAM_1_* which
are deprecated, so changing these to DT_INST_1_MMIO_SRAM_*.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-11-13 06:26:10 -06:00
Daniel Leung fc42c82cb9 soc: intel_s1000: define default MEMCTL reg value
When not using XCC, XCHAL_CACHE_MEMCTL_DEFAULT is not defined
which results in some variables not being able to be defined.
So define them.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-11-13 06:26:10 -06:00
Daniel Leung c6f4a970f1 soc: intel_s1000: add _heap_sentry to linker script
Newlib requires a _heap_sentry so we add it to the linker script,
similar to what other xtensa linker scripts.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-11-13 06:26:10 -06:00
Daniel Leung 28fb42643a soc: xtensa/intel_s1000_crb: fix build error on xtensa_api.h
Commit 2d7460482d missed replacing
the path to xtensa_api.h in the intel_s1000_crb soc.c file.
So update it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-11-07 21:34:03 -05:00
Ulf Magnusson bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Kumar Gala 00c7ce7942 linker: move where we define _LINKER and _ASMLANGUAGE
Move _LINKER and _ASMLANGUAGE to target.cmake because of how we pick the
linker script that might be used.  This way regardless of how or where a
linker.ld gets included we will always set _LINKER & _ASMLANGUAGE (so
any header that needs check based on those defines they can,
specifically generated_dts_board.h)

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-03 12:55:16 +01:00
Ulf Magnusson 2b61031c8f kconfig: Remove symbol types from Kconfig.defconfig files
Same deal as in commit 7fdb525754 ("kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), but I hacked Kconfiglib to also
find cases where the type is given separately as e.g.

    config FOO
            int
            default 3

Motivation (from a note in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html):

    For a symbol defined in multiple locations (e.g., in a
    Kconfig.defconfig file in Zephyr), it is best to only give the
    symbol type for the "base" definition of the symbol, and to use
    'default' (instead of 'def_<type>' value) for the remaining
    definitions. That way, if the base definition of the symbol is
    removed, the symbol ends up without a type, which generates a
    warning that points to the other definitions. That makes the extra
    definitions easier to discover and remove.

It's also nice if 'def_bool' and the like turn into a semi-reliable flag
that the symbol is only defined in Kconfig.defconfig files. That might
be a sign that things could be cleaned up.

Will do a separate pass later to remove some symbols only defined in
Kconfig.defconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-24 12:40:22 -05:00
Jan Van Winkel 70fb574a6e linker: cxx: xtensa: Added .gcc_except_table.*
Make sure that all sub-sections of .gcc_except_table are mapped in
rodata else C++ builds with exceptions enabled will generate warnings
due to orphan sections.

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-09-19 09:26:42 -05:00
Andrew Boie 6fd6b7e50a xtensa: remove legacy arch implementation
We re-wrote the xtensa arch code, but never got around
to purging the old implementation.

Removed those boards which hadn't been moved to the new
arch code. These were all xt-sim simulator targets and not
real hardware.

Fixes: #18138

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-12 01:26:34 -04:00
Kumar Gala d6e6a2be38 irq: intel_s1000: Fixup IRQ values for multi-level IRQ handling
Remove the handcoded multi-level IRQ values in device tree.  We now are
able to generate the encoded multi-level IRQ value.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
Daniel Leung 04ae38085c intel_s1000: implement z_soc_irq_is_enabled()
This provides an implemention for z_soc_irq_is_enabled()
as it is needed for multi-level interrupts.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-07 10:20:51 -04:00
Piotr Zięcik 4a543e138d drivers: spi_dw: Get clock frequency from DTS
The spi_dw driver used system clock frequency
as a base for SPI bus frequency calculation.
This commit corrects that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Piotr Zięcik f2d84f08ff arch: xtensa: Get CPU clock frequency from DTS
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Sathish Kuttan 876deb420d soc: intel_s1000: add lpsram in linker script
Add LPSRAM definition in MEMORY
Place DMA buffer section in LPSRAM

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-06-11 16:36:30 -04:00
Sathish Kuttan 35c4f53ad1 soc: intel_s1000: define lpsram memory for linker
Add definitions in memory.h for use in linker script
- LPRAM_BASE
- LPRAM_SIZE

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-06-11 16:36:30 -04:00
Sathish Kuttan 1f99253b6c soc: intel_s1000: add dts fixup for low power sram
Add dts fixup definitions for low power sram base address and size
- DT_LP_SRAM_BASE
- DT_LP_SRAM_SIZE

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-06-11 16:36:30 -04:00
Daniel Leung 7fe29dcee9 soc: intel_s1000: change cached regions to write-through
The i2s_cavs.c driver manipulates cache lines before commencing
any DMA transfers. With write-back cache, if the DMA receive
buffer is not aligned to the cache lines, the data around
the buffer will be invalidated and may never written to memory.
Since the driver takes an external memory slab as buffer and
there is no easy way to force cache line alignment on
the application side, set the cached region to write-through
to avoid potential issue.

Fixes #13223

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-04-12 17:59:06 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Patrik Flykt 24d71431e9 all: Add 'U' suffix when using unsigned variables
Add a 'U' suffix to values when computing and comparing against
unsigned variables.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-28 17:15:58 -05:00
Ulf Magnusson 53376394b7 kconfig: Remove blank lines at the beginning/end of files
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-13 07:29:42 -05:00
Patrik Flykt 4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Daniel Leung adb9f0e02e xtensa: intel_s1000: turn on XTENSA_ASM2
Turns on XTENSA_ASM2 by default for intel_s1000.

Fixes #11034

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-28 14:53:52 -08:00
Daniel Leung 4c77c91f83 soc: intel_s1000_crb: fix GPIO IRQ in dts_fixup.h
The IRQ defined in DTS has already been shifted so there is
no need to shift again in dts_fixup.h.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 20:18:13 -06:00
Daniel Leung f8cafdeb8e soc: intel_s1000: make zephyr_prebuilt.elf a lot smaller
Due to fake IDT_BASE address, zephyr_prebuilt.elf is about 1.1GB
in size due to all the empty space between end of SRAM and IDT_BASE.
So move the IDT_BASE to the empty space just after SRAM. The section
will be discarded in the final zephyr.elf so it should not be a big
issue. After this change, zephyr_prebuilt.elf is now a bit smaller
than 5MB.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 20:17:47 -06:00
Daniel Leung 603f068690 uart/ns16550: Use DT_ prefix for remaining device configs
Previous rename from CONFIG_* to DT_* left a few remaining
CONFIG_*. So rename them manually now.

Fix #13753

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 20:06:26 -06:00
Sathish Kuttan 1b064787ef soc: intel_s1000: remove wrappers for cache ops
Remove function wrappers for cache operations
Replaced by SOC level macros.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-20 07:33:11 -05:00
Sathish Kuttan 9ab20620d8 soc: intel_s1000: macros for data cache operations
Add SOC level macros to flush and invalidate data cache.
Individual drivers can use this macro instead of defining
their own macros.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-20 07:33:11 -05:00
Daniel Leung 1e7025c2e7 boards: intel_s1000_crb: fix setting cache attributes
This reverts commit c9ace83c89 which
bypasses setting cache attributes.

The previous cache attributes actually set the text/data/etc.
sections to be inaccessible. So fix it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-15 16:21:50 -05:00
Sathish Kuttan 66d0898a21 soc: intel_s1000: add audio master clock config
Added a SOC level routine to configure master clock outputs
if CONFIG_AUDIO is defined.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-11 21:34:08 -05:00