Commit Graph

12 Commits

Author SHA1 Message Date
Anas Nashif d780d97f9b boards: define user buttons and switches on boards
Change-Id: I1b03b77835510685fba91fb2f74a0f9b6125f570
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-07 14:14:04 +00:00
Kumar Gala 585b4b5b6d nucleo_f103rb: Remove empty board file
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly.  This is cleaner than keeping around
files that don't do anything.

We keep around board.h for now since drivers and other code might expect
it to exist.

Change-Id: I28f3ccc6e6c7c20c679fd0e4ab36aaa8b1e72d75
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-07-28 16:22:14 +00:00
Kumar Gala 9ec2f3be80 Cleanup whitespace in Kconfig files
Convert leading whitespace into tabs in Kconfig files.  Also replaced
double spaces between config and <prompt>.

Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-25 13:28:07 -05:00
Dan Kalowsky 69c7f1e621 boards: nucleo: Adding flash support
Adding an openocd.cfg to control flashing of the Nucleo-F103RB board

Change-Id: Ia730244bdc2d31d074fe72c41d3e58e7830c8df0
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 17:01:47 +00:00
Anas Nashif 4b411b34a1 stm32: rename SOC_STM32F1X -> SOC_SERIES_STM32F1X
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.

Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Anas Nashif 9bf2da7ef4 stm32: rename CONFIG_SOC_STM32 -> CONFIG_SOC_FAMILY_STM32
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.

Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Daniel Leung cecc4b0fb5 pinmux: remove base address and number of pins from kconfig
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.

Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung 8df10d4584 kconfig: untangle ordering and dependencies
There are two major issues with the kconfig:

() Some of the config options have incorrect dependencies inside help
   under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.

() Since the SoC and board specific kconfig files are parsed first,
   the help screen would say, for example, CONFIG_SPI is defined at
   arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
   the actual config is defined in drivers/spi/Kconfig.

These cause great confusion to users of menuconfig/xconfig.

To fix these, the SoC and board defaults are now to be parsed last.

Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.

And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.

Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Vinicius Costa Gomes d872bb173c pinmux: Move STM32 boards to the pinmux model
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.

Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 06:17:33 -04:00
Maciek Borzecki a4808956fc boards/nucleo_f103rb: default to 115200 for USART2 speed
Change-Id: I72618afc33665cc17f7a230f9dada5666a4ded8e
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-23 11:47:36 -04:00
Maciek Borzecki fa31a240c8 boards/nucleo_f103rb: enable 72MHz system clock by default
Enable 72MHz SYSCLK by default. The board does not have an on-board
quartz, however the STLink frontend produces a 8MHz clock signal that we
can use. Since the clock signal is not coming from an oscillator, HSE
bypass must be enabled. Make sure not to exceed 36MHz clock on APB1 bus.

Change-Id: I6b0b499a1cc4b0deccbfa374fc9ca3e3e8cc38c5
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-23 11:47:36 -04:00
Maciek Borzecki 4ee4a6abad boards/nucleo_f103rb: add new board
Add configuration for Nucleo-64 F103RB board. By default, the UART
console is forwarded to USART2, available on STLink V2-1 USB
connector. All GPIO ports available on the connecot headers are
enabled.

Change-Id: I266170d1288ef27f668410c5737c46cdf716e137
Origin: Original
Signed-off-by: Maciek Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:49:32 +00:00