Previous the register size was 1M, technically the there are only a
small handful of registers defined in the IOAPIC, so shrinking the size
to 4k, so its as most one page large.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_format): /soc/uart@000003f8:
unit name should not have leading 0s
Fix these by remove the leading 0s.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere. We also have DT_SIZE_M, so use that in a few
places as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
patch removes the mem.h and marcos used in that file are
moved appropriate board files. As there are boards with
different flash configuration but of same soc, flash and
ram size are moved to dts file instead of dtsi
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
1. Use compatible "ns16550" to match upstream binding
2. Add reg-shift as optional property to binding yaml
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Kumar Gala