Add XIP support with MWDT toolchain. To have it proper tested
add separate nsim platforms for XIP (flash + sram) and
non-XIP (sram) memory organization in addition to existing
nsim_hs platfor with CCMs (ICCM + DCCM) memory organization.
This PR also enables MPU for all nsim hs3x based platforms
(like we previously enabled it for qemu_arc_hs) to have proper
memory regions permissions.
Signed-off-by: Nikolay Agishev <agishev@synopsys.com>