Commit Graph

7 Commits

Author SHA1 Message Date
Ryan McClelland 672a401f20 i3c: add cdns i3c driver
This gives initial support to the cadence i3c controller

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2022-12-12 15:51:16 -05:00
Ryan McClelland 371470d608 i3c: GETMWL and GETMRL may be optionally supported if no settable limit
According to section 5.1.9.3.5 and 5.1.9.3.6 of the I3C Specification
v1.1.1. This CCC is may be optionally supported if the target device
has no settable limit.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2022-12-12 15:51:16 -05:00
Ryan McClelland b7dc01cd48 i3c: rename is_primary to is_secondary
Rename is_primary to is_secondary. The justification for this is
because it is less likely to have something configured to be
secondary, and the 0 value would be if it is primary.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2022-12-12 15:51:16 -05:00
Ryan McClelland ce6da0fb51 i3c: fix ccc setmrl/setmwl helper addr
i3c CCC SETMRL/SETMWL were using the static addr, the
dynamic address must be used

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2022-10-14 12:27:39 -04:00
Daniel Leung 3e8f97009d i3c: add I3C controller driver for MCUX
This adds a very basic driver to utilize the I3C IP block
on MCUX (e.g. RT685). Note that, for now, this only supports
being the active controller on the bus.

Origin: NXP MCUXpresso SDK
License: BSD 3-Clause
URL: https://github.com/zephyrproject-rtos/hal_nxp
Commit: 2302a1e94f5bc00ce59db4e249b688ad2e959f58
Purpose: Enabling the I3C controller on RT685.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00
Daniel Leung 66a9a15104 i3c: add a global workqueue for IBI
Adds support for a global workqueue so drivers can defer
IBI callbacks instead of doing it in interrupt context.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00
Daniel Leung ce7058d2f5 drivers: i3c: introduce I3C API for controllers
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00