zephyr

Commit Graph

Author	SHA1	Message	Date
Evgeniy Paltsev	38c24cd5aa	ARC: boards: nSIM: memory layout overhaul Currently we use incorrect memory layout for SMP boards as we put data (which need do be accessible from all cores) to DCCM which is private for each CPU core. This works for nSIM which doesn't simulate CCMs (as we don't pass corresponding nSIM options for SMP configurations) however it won't work if we run that code on real HW (we want to achieve that nSIM configurations are also runnable on HAPS - FPGA platform). Let's fix that issue by using DDR instead of CCMs for SMP configurations (nsim_hs_smp and nsim_hs6x_smp). While I'm at it - switch UP HS6x configuration (nsim_hs6x) for DDR usage instead of CCMs - to make that configuration closer to the HAPS config we have. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>	2022-05-06 11:31:21 +02:00
Alexey Brodkin	61f073a735	board/nsim: Add support of ARC HS cores in nSIM ARC nSIM simulates pretty much any modern ARC core, moreover it emulates a lot of different core features so it is possible to play with them even wo real hardware. Thus we add yet another ARC core family to be used on simulated nSIM board. For now it's just a basic configuration with ARC UART for smoke-testing of Zephyr on ARC HS CPUs. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>	2019-07-31 09:25:15 -07:00

Author

SHA1

Message

Date

Evgeniy Paltsev

38c24cd5aa

ARC: boards: nSIM: memory layout overhaul

Currently we use incorrect memory layout for SMP boards as
we put data (which need do be accessible from all cores) to
DCCM which is private for each CPU core.

This works for nSIM which doesn't simulate CCMs (as we don't pass
corresponding nSIM options for SMP configurations) however
it won't work if we run that code on real HW (we want to achieve
that nSIM configurations are also runnable on HAPS - FPGA platform).

Let's fix that issue by using DDR instead of CCMs for SMP
configurations (nsim_hs_smp and nsim_hs6x_smp).

While I'm at it - switch UP HS6x configuration (nsim_hs6x)
for DDR usage instead of CCMs - to make that configuration closer
to the HAPS config we have.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>

2022-05-06 11:31:21 +02:00

Alexey Brodkin

61f073a735

board/nsim: Add support of ARC HS cores in nSIM

ARC nSIM simulates pretty much any modern ARC core,
moreover it emulates a lot of different core features so
it is possible to play with them even wo real hardware.

Thus we add yet another ARC core family to be used on simulated
nSIM board.

For now it's just a basic configuration with ARC UART for
smoke-testing of Zephyr on ARC HS CPUs.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

2019-07-31 09:25:15 -07:00

2 Commits