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zephyr
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3 Commits

Author SHA1 Message Date
Jiafei Pan 799f37b421 arm64: add nocache memory segment support 
In some drivers, noncache memory need to be used for dma coherent
memroy, so add nocache memory segment mapping and support for ARM64
platforms.

The following variables definition example shows they will use nocache
memory allocation:
   int var1 __nocache;
   int var2 __attribute__((__section__(".nocache")));

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
 2021-10-20 08:56:40 -05:00
Ioannis Glaropoulos 6cbc0e0bd9 arch: common: nocache: fix linker section definition 
No-cache SRAM section is currently used for ARM-only builds
with support for no-cacheable memory sections (i.e.
CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT) and it holds
uninitialized data. This commit properly defines the
corresponding linker section using SECTION_DATA_PROLOGUE
and GROUP_DATA_LINK_IN macros.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
 2019-06-19 09:08:40 -07:00
Øyvind Rønningstad e4024e274b arch: port nocache linker code to use Cmake function 
Remove from linker.ld

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
 2019-05-20 22:28:28 -04:00