Commit Graph

899 Commits

Author SHA1 Message Date
Sebastian Bøe 0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe 12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Adithya Baglody 83bedcc912 ARM: MPU: Arch specific memory domain APIs
Added architecture specific support for memory domain destroy
and remove partition for arm and nxp. An optimized version of
remove partition was also added.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-11-07 12:22:43 -08:00
Bobby Noelte 3849b36f09 arch: arm: soc: provide support for stm32f091
Support the ST STM32F091xC SoC.

Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
2017-11-06 11:39:16 -06:00
Youvedeep Singh fc78ddf7d3 ARM: nrf52: Power Management for nrf52 series SOC
Add support for nrf52 series SOC. This patch Adds :-
1. Architecture specific Power Management APIs.
2. APIs for invoking various Power Management tasks into nrf52.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-11-06 09:29:10 -05:00
Kumar Gala 75833d4f52 arm: nxp_kinetis: cleanup soc.h - remove unused defines
Remove defines for IRQs we don't use.  We should be getting this from DT
so this gives us a list of what we need to cleanup.  Remove various
memory address offset defines to the ones we actually use.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-11-03 13:52:57 -05:00
Leandro Pereira b007b64d30 kernel: Add option to ensure writable pages are not executable
This adds CONFIG_EXECUTE_XOR_WRITE, which is enabled by default on
systems that support controlling whether a page can contain executable
code.  This is also known as W^X[1].

Trying to add a memory domain with a page that is both executable and
writable, either for supervisor mode threads, or for user mode threads,
will result in a kernel panic.

There are few cases where a writable page should also be executable
(JIT compilers, which are most likely out of scope for Zephyr), so an
option is provided to disable the check.

Since the memory domain APIs are executed in supervisor mode, a
determined person could bypass these checks with ease.  This is seen
more as a way to avoid people shooting themselves in the foot.

[1] https://en.wikipedia.org/wiki/W%5EX

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-02 13:40:50 -07:00
Leandro Pereira da9b0ddf5b drivers: Rename `random` to `entropy`
This should clear up some of the confusion with random number
generators and drivers that obtain entropy from the hardware.  Also,
many hardware number generators have limited bandwidth, so it's natural
for their output to be only used for seeding a random number generator.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Leandro Pereira adce1d1888 subsys: Add random subsystem
Some "random" drivers are not drivers at all: they just implement the
function `sys_rand32_get()`.  Move those to a random subsystem in
preparation for a reorganization.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Carles Cufi e08a5b0200 arch: arm: kinetis: Remove duplicate CLOCK_CONTROL config option
The CLOCK_CONTROL config option is already defined in
drivers/clock_control, so there's no need to redefine it in arch/.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-11-01 11:48:07 +01:00
Anas Nashif 9b93334832 soc: ti_simplelink: rename header directory for registers
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 12:32:34 -04:00
Anas Nashif 780324b8ed cleanup: rename fiber/task -> thread
We still have many places talking about tasks and threads, replace those
with thread terminology.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-30 18:41:15 -04:00
Bobby Noelte 2f7688bfd3 arch: arm: core: fix vector table relocate write to flash
Some SOCs (e.g. STM32F0) can map the flash to address 0 and
the flash base address at the same time. Prevent writing to
duplicate flash address which stops the SOC.

Allow Cortex M SOCs to create their own vector table relocation
function.

Provide a relocation function for STM32F0x SOCs.

Fixes #3923

Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-10-23 12:31:47 +02:00
Maciej Debski db8fd88fab arch: arm: soc: provide support for stm32f0.
Fixes #3923

Signed-off-by: Maciej Debski <maciej.debski@rndity.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-10-23 12:31:47 +02:00
Piotr Mienkowski 26ba99e972 drivers: Add Atmel SAM family I2C (TWI) driver
Added I2C bus (TWI) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.

Tested on Arduino Due board.

Origin: Original

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-10-23 10:18:08 +02:00
Adam Podogrocki 61467e019e iwdg: the sample of the use of STM32 Independent Watchdog
JIRA: ZEP-2347

Change-Id: I808e9f110681735cae45d14c5802636012f018cc
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-10-23 09:51:16 +02:00
Adam Podogrocki 6d4da19602 iwdg: make independent watchdog driver compliant with STM32Cube LL API
Appropriate inclusion done for F1/F3/F4/L4 families in SoC tree.

JIRA: ZEP-2347

Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-10-23 09:51:16 +02:00
Kumar Gala 46555f17e9 i2c: stm32f3: Cleanup how we enable the specific I2C driver
Match change we made to how I2C is enabled for other stm32 platforms:

Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it.  When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled.  While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-22 22:05:37 -05:00
Andrew Boie 48af600a7a Revert "ARM: MPU: Arch specific memory domain APIs"
This reverts commit 7add3cdd82.
2017-10-20 15:02:59 -04:00
Adithya Baglody 7add3cdd82 ARM: MPU: Arch specific memory domain APIs
Added architecture specific support for memory domain destroy
and remove partition for arm and nxp. An optimized version of
remove partition was also added.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-20 10:39:51 -07:00
Erwan Gouriou da210ba0ba driver: serial: Move STM32 UART driver to LL API
STM32 UART driver was using a mix of LL/HAL APIs.  This commit removes
calls to HAL API and replaces them with LL APIs.  No functional change
have been seen during non regression testing.

But we could note a direct gain of 1Kb of ROM

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-10-20 12:28:11 -05:00
Yannis Damigos a172f72d84 boards: stm32f3_disco: Add I2C support
Add I2C support to STM32F3DISCOVERY board

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-20 12:28:11 -05:00
Maureen Helm 6312b0e6a1 arm: Enable the mcux sim clock control driver on Kinetis SoCs
Because the mcux shim drivers will soon depend on a clock control
interface, enable the mcux sim clock control driver by default on all
Kinetis SoCs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-10-20 12:28:11 -05:00
Manivannan Sadhasivam 05e1d8c46a arch: arm: soc: ti_simplelink: Add MSP432P401R SoC
This patch adds SoC support for TI SimpleLink family MSP432P401R.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2017-10-19 12:16:11 -05:00
David B. Kinder 4600c37ff1 doc: Fix misspellings in header/doxygen comments
Occasional scan for misspellings missed during PR reviews

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-10-17 19:40:29 -04:00
Andrew Boie c5c104f91e kernel: fix k_thread_stack_t definition
Currently this is defined as a k_thread_stack_t pointer.
However this isn't correct, stacks are defined as arrays. Extern
references to k_thread_stack_t doesn't work properly as the compiler
treats it as a pointer to the stack array and not the array itself.

Declaring as an unsized array of k_thread_stack_t doesn't work
well either. The least amount of confusion is to leave out the
pointer/array status completely, use pointers for function prototypes,
and define K_THREAD_STACK_EXTERN() to properly create an extern
reference.

The definitions for all functions and struct that use
k_thread_stack_t need to be updated, but code that uses them should
be unchanged.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-17 08:24:29 -07:00
Pushpal Sidhu d5cf7e0912 arch: stm32f4: Add CONFIG_GPIO_STM32_PORTD=y
Default enable PD for all stm32f4 series

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2017-10-17 08:56:15 -05:00
Loic Poulain 8a11f91252 usb: Add support for STM32 family USB driver
This is a USB controller driver for STM32F4xx devices using
the STM32 Cube HAL_PCD framework. This has been tested with
the cdc_acm driver on a 96b_carbon board (STM32F401RE).

This is a refactoring of:
usb: usb_dc_stm: Add support for STM32Cube HAL_PCD USB driver
Signed-off-by: Christer Weinigel <christer@weinigel.se>
[daniel.thompson@linaro.org: Removed STM32F40(157) defconfig changes
together with STM32F4Discovery pinmux and defconfig changes, updated
clock settings and pad configuration to match latest mainline]
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[giannis.damigos@gmail.com: Change uint*_t types to u*_t types,
change SYS_LOG_USB_DC_STM_LEVEL to SYS_LOG_USB_DRIVER_LEVEL and
update pinmux to match latest arm branch]
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2017-10-17 09:14:47 -04:00
Yannis Damigos 1f0c6118d2 arch: stm32f4: Select USB_DC_STM32 driver if USB is enabled
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-17 09:14:47 -04:00
Jonas Pfaff b62a353551 drivers: adc: Add SAM ADC driver
Tested on Atmel SMART SAM E70 Xplained board

Origin: Original

Jira: ZEP-2507

Signed-off-by: Jonas Pfaff <jonas.pfaff@gmail.com>
2017-10-10 11:56:47 -05:00
Christian Taedcke 3959282359 arm: exx32: Add Silabs EFM32WG soc files
The Silicon Labs EFM32 Wonder Gecko MCU includes:

        * Cortex-M4F core at 48MHz
        * up to 256KB of flash and 32KB of RAM
        * USB with host and OTG support
        * multiple low power peripherals

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-10 11:56:47 -05:00
Johann Fischer af1a8fc9f1 arch: nxp_kinetis: initial import KW2XD SiP
Jira: ZEP-1471

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2017-10-10 11:56:47 -05:00
Andrew Boie 468190a795 kernel: convert most thread APIs to system calls
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-07 10:45:15 -07:00
Marti Bolivar 313b20d648 dfu: replace FLASH_ALIGN with FLASH_WRITE_BLOCK_SIZE
Use the define generated by the DTS instead of using the FLASH_ALIGN
alias. The latter is an internal mcuboot name. We shouldn't need it in
Zephyr itself.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-10-06 22:12:23 -04:00
Marti Bolivar c38efa668c arm: soc: stm32l4: add flash driver for IMG_MANAGER
Add definition required to enable the DFU subsystem image manager.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-10-06 22:12:23 -04:00
Marti Bolivar 92e29680c1 arm: soc: stm32f4: add flash driver for IMG_MANAGER
Add definition required to enable the DFU subsystem image manager.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-10-06 22:12:23 -04:00
Marti Bolivar 2e6744f215 arm: soc: nxp: k6x: add flash driver for IMG_MANAGER
Add definition required to enable the DFU subsystem image manager.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-10-06 22:12:23 -04:00
Thiago Silveira e11b9fb4e3 arm: soc: nRF52: Add workaround for incorrect RESETREAS bits, errata 136
This workaround fixes the issue that, after pin reset, RESETREAS bits
other than RESETPIN might also be set.

The workaround was added to both nRF52832 and nRF52840 SoCs.

Signed-off-by: Thiago Silveira <thiago@exati.com.br>
2017-10-06 22:11:21 -04:00
Paul Sokolovsky 808b315cf6 arm: nxp: kw41z: Select IEEE802154_KW41Z driver for networking
802.15.4 is the networking hardware available in KW41Z SoC (and
supported by Zephyr). So, if networking in enabled, automatically
select the corresponding driver. This is similar to how frdm_k64f
automatically selects Ethernet driver, 96b_carbon selects BLE/IPSP
drivers, etc. (But we apply it on SoC level to reuse across the
boards.)

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-10-06 14:39:17 -05:00
David B. Kinder f00f58517b doc: replace UTF-8 chars
Some our Zephyr tools don't like seeing UTF-8 characters, as reported in
issue #4131) so a quick scan and replace for UTF-8 characters in .rst,
.h, and Kconfig files using "file --mime-encoding" (excluding the /ext
folders) finds these files to tweak.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-10-03 20:03:57 -04:00
Anas Nashif be9a0b35ee arm: atmel: define soc family in correct Kconfig
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-03 08:43:50 -04:00
Chunlin Han e9c9702818 kernel: add memory domain APIs
Add the following application-facing memory domain APIs:

k_mem_domain_init() - to initialize a memory domain
k_mem_domain_destroy() - to destroy a memory domain
k_mem_domain_add_partition() - to add a partition into a domain
k_mem_domain_remove_partition() - to remove a partition from a domain
k_mem_domain_add_thread() - to add a thread into a domain
k_mem_domain_remove_thread() - to remove a thread from a domain

A memory domain would contain some number of memory partitions.
A memory partition is a memory region (might be RAM, peripheral
registers, flash...) with specific attributes (access permission,
e.g. privileged read/write, unprivileged read-only, execute never...).
Memory partitions would be defined by set of MPU regions or MMU tables
underneath.
A thread could only belong to a single memory domain any point in time
but a memory domain could contain multiple threads.
Threads in the same memory domain would have the same access permission
to the memory partitions belong to the memory domain.

The memory domain APIs are used by unprivileged threads to share data
to the threads in the same memory and protect sensitive data from
threads outside their domain. It is not only for improving the security
but also useful for debugging (unexpected access would cause exception).

Jira: ZEP-2281

Signed-off-by: Chunlin Han <chunlin.han@linaro.org>
2017-09-29 16:48:53 -07:00
Chunlin Han 95d28e53bb arch: arm: add initial support for CONFIG_USERSPACE
add related configs & (stub) functions for enabling
CONFIG_USERSPACE on arm w/o build errors.

Signed-off-by: Chunlin Han <chunlin.han@linaro.org>
2017-09-26 10:00:53 -07:00
Maureen Helm f0d50979e8 mcux: nxp_kinetis: Move HAS_TRNG config to ext
SoCs outside the Kinetis family can have the TRNG module, so move the
HAS_TRNG config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Maureen Helm 5ba9f26b46 mcux: nxp_kinetis: Move HAS_RNGA config to ext
SoCs outside the Kinetis family can have the RNGA module, so move the
HAS_RNGA config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Maureen Helm 694c7f5ca4 mcux: nxp_kinetis: Move HAS_FTM config to ext
SoCs outside the Kinetis family can have the FTM module, so move the
HAS_FTM config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Note that 'select HAS_FTM' was previously missing from Kconfig.soc and
is now fixed.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Maureen Helm f7a37cea8d mcux: nxp_kinetis: Move HAS_ADC16 config to ext
SoCs outside the Kinetis family can have the ADC16 module, so move the
HAS_ADC16 config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Maureen Helm fe4c3aacba mcux: nxp_kinetis: Move HAS_LPSCI config to ext
SoCs outside the Kinetis family can have the LPSCI module, so move the
HAS_LPSCI config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Maureen Helm bbafc833db mcux: nxp_kinetis: Move HAS_LPUART config to ext
SoCs outside the Kinetis family can have the LPUART module, so move the
HAS_LPUART config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Anas Nashif db4eba64da dfu: img_util: move flash defines to SoC
mcuboot_constraints.h had FLASH information related to the SoC that
should be maintained as part of the SoC and not in the subsystem. Also
fixed Makefiles to check for IMG_UTIL Kconfig and not MCUBOOT.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-21 06:46:27 -04:00