Commit Graph

576 Commits

Author SHA1 Message Date
Benjamin Walsh aed578cb03 x86/cache: rename _SysCacheFlush to sys_cache_flush
Change-Id: Idb1bbedea9577856ea6db08683ea4a4ead92e14d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:41 -05:00
Benjamin Walsh b7875a0bc8 x86: Rename PHYS_ADDR/VIRT_ADDR to paddr_t/vaddr_t
Change-Id: I8e037278f2f1d409360c52276cb4dae87b9ad440
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:41 -05:00
Andrew Boie 8397dc5028 _irq_handler_set: don't require old function as parameter
This was kept around since it used to be necessary for x86, and we
want our APIs to keep partity across arches, but with the x86 IRQ
refactoring this is no longer needed.

Change-Id: Iacd61f4c4d3cc33b4a15bfa083e106ba6d5da942
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:41 -05:00
Dan Kalowsky 7ed1abfdda checkpatch: warning - new_typedefs
Removing many of the typedefs that are only used once to lessen the
checkpatch warning about creating new typedefs.  A handful have been
behind as they would require a more invasive change to the code.  It
has yet to be determined if this is a worthwhile endavour.


Change-Id: Ibeb29e0a1d37e8121218fccf0d986cbebd226e85
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:41 -05:00
Michael LeMay ef2a2254e6 eth: dw: galileo: Provide pre-set MMIO base address and IRQ
Provide a preconfigured base address for MMIO and a preconfigured IRQ
pin identifier for the first PCI Ethernet MAC in the Intel Quark X1000
SoC.

Change-Id: I1b527df6c3b1b65da9f0233464e54157029f04f5
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
2016-02-05 20:24:38 -05:00
Anas Nashif 2ad03b930d define range for FAULT_DUMP config variable
Only allow valid values to be set for this option.

Change-Id: I11dd7381ddbf6d4d9985255b9b784544074aba63
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:37 -05:00
Jeff Blais b746ec13bc galileo: Fix pinmux function assignment comments
Change-Id: I099773701448b09bc3fa0607552fadec39e24407
Work-by: Jeff Blais <jeffrey.blais@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Signed-off-by: Jeff Blais <jblais@windriver.com>
2016-02-05 20:24:37 -05:00
Benjamin Walsh 34f53085f3 galileo: add missing configure call for PWM0
If PWM had been configured by some other application after the last
power cycle, it would appear to work fine. However, an application using
PWM loaded right after a power cycle would not work, since the configure
call was missing during boot.

Change-Id: I389ca2122e1a4a7ea6d298efb327438761336d75
Work-by: Mike Hirst <michael.hirst@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:37 -05:00
Allan Stephens 0a58ade768 x86: Revise appearance of floating point configuration options
Streamlines the prompts and help text for the floating point
configuration options to make them easier to understand. Also
fixes a help text error that said fibers using the floating point
registers needed to provide additional stack space, which is
incorrect.

Change-Id: Ib6fc13460999ec7f737118728a363b4e10d23fcf
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:36 -05:00
Anas Nashif a5c85bb010 doxygen: various doxygen layout fixes
Change-Id: Ic1d3d3bb6c4ca2b67098331f9fcfb320a2c47402

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:36 -05:00
Dan Kalowsky ec1772b69f system: fix comment of file name
galileo.c currently calls itself system.c in a comment.  It lies.
ia32.c currently calls itself system.c in a comment. Don't believe it.
ia32_pci.c currently calls itself system.c in a comment.  It lies.

Change-Id: Icdba074ff2e2e478529bc5757c90b5adbc9dcb8a
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:36 -05:00
Tomasz Bursztyka 5938cf1a0a pinmux: galileo: Set SPI1_MISO correct settings
GPIO7 and SPI1_MISO share the same muxer and SPI1_MISO is an input pin.

Change-Id: Ib55e03680fadc3f8ce2725fad6761b3551134081
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:36 -05:00
Dan Kalowsky d89c3b598b checkpatch: warning - space_before_tab
Change-Id: I8d36cdcdd1822cafa7f53f8b8a8788992b0703e3
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:36 -05:00
Dan Kalowsky 2a57d02400 checkpatch: warning - spacing
Change-Id: Ia63d6c9d8d3c1bd9c540a039263cb8507af82b1e
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:35 -05:00
Dan Kalowsky 2a63743192 cleanup: removing NOMANUAL
The \NOMANUAL tag is a remnant from days of yore and is no longer
needed or useful.  Cleaning up the code references to this.

Change-Id: I1b8cc9c9560d1dbb711f05fa63fd23386789875c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:35 -05:00
Andrew Boie 090385b666 x86: remove boi handler support, eoi argument
This was only needed for the older 8259A style PICs which are no
longer supported.

Since we now just support APIC, we always just call loapic_eoi which
no longer requires an argument and informs the IOAPIC that the interrupt
is complete if necessary.

Change-Id: I15c9b7b4f03b872656220af32220b62e043bfa6b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:35 -05:00
Tomasz Bursztyka e560c90c0e galileo: SPI and pinmux init level need to be reversed
SPI port 1 needs the pinmuxer to be initialized first. Or then, all
modifications required from the CS GPIO logic won't apply.

Change-Id: Ibe4b2d4096065a9add23373075090d5e8a014650
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:35 -05:00
Tomasz Bursztyka 95116abb0b spi: galileo: SPI port 1 uses DW GPIO pin 2 for CS
As for the SPI port 0, SPI port 1 needs a GPIO pin to emulate the CS.

Change-Id: I00911cd25c3fa0ae17a02ee6f43cbea7f4fbcca2
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:35 -05:00
Peter Mitsis 0362db8a63 x86: use _IRQ_TO_INTERRUPT_VECTOR() with ioapic_irq_set()
ioapic_irq_set() needs a vector number: all calls to it now use the
_IRQ_TO_INTERRUPT_VECTOR() macro as expected.

The previous change by which interrupt priorities are now honoured
correctly when connecting ISRs to IRQs statically also changed the way
the interrupt vectors are assigned.

Instead of computing them like this:

    interrupt vector ID = IRQ + INT_VEC_IRQ0

They are now determined by a macro:

    interrupt vector ID = _IRQ_TO_INTERRUPT_VECTOR(irq)

Change-Id: Icc4576ac9bc6891c8662bcc17a543333eb8745e0
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:35 -05:00
Anas Nashif 280452061d doxygen: use @a on parameters instead of < >
Change-Id: I2933df165a3c1f95b1d02f57f38bc7587008ce5d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:35 -05:00
Anas Nashif a5c3644bca arc: replaced wrong config variable
Change-Id: Ib72e35105e575dc5744fe59fd27265e6ed203daf
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:35 -05:00
Peter Mitsis 47888a31db Update static IDT generation to use IRQ priority
Updates the 'gen_idt' tool to generate a mapping of IRQ numbers to
interrupt vector IDs, thereby allowing the IRQ priority to be utilized
when statically connecting an interrupt.

Change-Id: I2e54ceb65145682820dfbd8ca1ee6ec68d71ce1a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:34 -05:00
Peter Mitsis 5084b6da56 Fix various default IRQ priorities
Changes the default IRQ priority level from 0 to 2 for the following
kernel configuration options as priorities 0 and 1 are reserved for the
first 32 IDT entries.

	SHARED_IRQ_0_PRI
	SHARED_IRQ_1_PRI
	I2C_DW_0_INT_PRIORITY
	GPIO_DW_0_PRI
	GPIO_DW_1_PRI
	SPI_INTEL_PORT_0_PRI
	SPI_INTEL_PORT_1_PRI

Change-Id: I0fc821c68156eb1e1fe776b2bd4ff5890bba40e8
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:34 -05:00
Peter Mitsis 80c18a1d3d Remove Kconfig option NUM_GDT_SPARE_ENTRIES
The Kconfig option NUM_GDT_SPARE_ENTRIES is no longer relevant.

Change-Id: Ie41ed3bef50bd4198c4cee45e160f008c53bfed4
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:34 -05:00
Peter Mitsis 4ebdf7f84b Rename NO_NESTED_INTERRUPTS to NESTED_INTERRUPTS
Renames the Kconfig option NO_NESTED_INTERRUPTS to NESTED_INTERRUPTS
as it is typically easier to follow positive logic than it is to
follow negative logic.

Change-Id: I68f9220621545a72254ba561aa3cb488e59e402a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:34 -05:00
Andrei Emeltchenko 3cc5b7b15e ia32: Remove unneeded define and mark parameter unused
CONSOLE_HANDLER depends on UART_CONSOLE so this define is not needed.
Also mark parameter unused.

Change-Id: I58b52955a22de3fb3216454a1d802eef63c9f845
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:34 -05:00
Andrei Emeltchenko 7c9206e9b0 galileo: Correct init layers for UARTs
Copy initialization sequence from ia32 configuration.

Change-Id: Idd33f2dcd5aeefeddfe50ec8a6b054cad38c0022
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-02-05 20:24:33 -05:00
Andrei Emeltchenko 9eaa84a40d galileo: Specify IRQ number for UART1
Change-Id: I87a53c0c539777b9d2b18c30e3168fcae36342aa
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-02-05 20:24:33 -05:00
Andrei Emeltchenko 1e1bb51da2 Bluetooth: Configure Bluetooth for galileo platform
Configure IOAPIC for Bluetooth interrupts connected to UART.

Change-Id: Iad58f52e95c05245d38dd0f4cb10494b53bad8e0
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-02-05 20:24:33 -05:00
Andrei Emeltchenko 3195016822 Bluetooth: Configure Bluetooth IRQ for ia32 platform
Configure IOAPIC for Bluetooth interrupts connected to UART.

Change-Id: Ia93f71a8e8435c523dd8ee232f9ce4cf9266b978
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-02-05 20:24:33 -05:00
Andrei Emeltchenko 5713a749af Bluetooth: Configure Bluetooth IRQ for ia32_pci platform
Configure IOAPIC for Bluetooth interrupts connected to UART.

Change-Id: Ib9c208a1d396bb6f51531e970d515e42ff416e6c
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky d81d8bcbfa checkpatch: error - spacing
Change-Id: Ie051000e3d3f0f5bdc330d0265010c37acb873bd
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky 45eb81f32d checkpatch: warning - static_const_char_array
Change-Id: Iff0d922a7b9ad498820527e71b31701bb06c400e
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky 890cc2f1ef checkpatch: warning - line_spacing
Change-Id: I2276676142deea21cf8079449ce153f2fb887a8e
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky e45956c9a0 checkpatch: warning - leading_space
Change-Id: I34a54230bc4a63c8a4391d03ff530835910c3705
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky e8563c2f97 checkpatch: error - trailing_whitespace
Change-Id: I819d13f0d7a23e3a61dcda6a3ced18810b192158
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky 9760129627 checkpatch: error - open_brace
Change-Id: Ie655181d5ed11a71cadfa218f396f0b64992ca34
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky da67b29569 checkpatch: warning - block_comment_style
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky 3a109b1f00 Adding in doxygen comment headers
Moving many of the functions from the old format of inline comments to
the newer doxygen format.

Change-Id: Ib0fe0d8627d7cd90219385a3ab627da8f9637d98
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:33 -05:00
Allan Stephens 027ed5682b x86+arm: Remove symbols needed only by Diab toolchain
These symbols are no longer required.

Change-Id: I99f6afad0ffb116efde1e2ff28252a2e4d8b7fb4
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:32 -05:00
Allan Stephens 7011b1c8da x86: Undo workaround required by Diab toolchain
This workaround is no longer required.

Change-Id: I797237be77b7568fe836df0e82640027d8d4882b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:32 -05:00
Allan Stephens eff3508f16 x86: Remove cosmetic traces of Diab toolchain
Updates several files to remove mention of Diab toolchain
support, which is no longer supported. These changes do not
affect system operation.

Change-Id: If9de85e595f6685295e565bc94ca17f51d87513f
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:32 -05:00
Daniel Leung fed1cc8833 x86: galileo: pinmux: update get/set functions
This implements the get function for the Galileo pinmux
driver. Also modify the set function so that the get
function would work correctly.

Change-Id: I463b01a903389a9c640bb1354ce92b9c0e37030f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:32 -05:00
Anas Nashif bcc16634ac spi: move static stubs to driver directory
Change-Id: Idd08e79eec429df00673a10790ec85afbe3183f6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:32 -05:00
Anas Nashif 87fe9387fb shared_irq: move static stubs to driver directory
Change-Id: I55808e5e460486c7f61919eca0aba9e2f4b434e1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:32 -05:00
Anas Nashif 47869287a4 gpio: move static stubs to driver directory
Change-Id: I6077aaeba4d572ddfa9d696014c6aec08abd3d3a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:32 -05:00
Andrei Emeltchenko e3f542cf2f galileo: Correct typo and mark variable unused
Change-Id: I0a386b293ddff54bbce8035670a282201eb5358b
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-02-05 20:24:32 -05:00
Andrei Emeltchenko c7b152932d galileo: Remove unneeded defines
If console handler is defined uart console should also be defined.

Change-Id: I3efcc6c837f8f1621340f7f13bf0603d7dc42fb2
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-02-05 20:24:32 -05:00
Tomasz Bursztyka 17e06fb457 uart: Move generic API to root directory of include
Only driver specific public headers should be found in include/drivers.
All generic API are found in include/ directory.

Change-Id: Ic50931987bb9460fd4a3843abc6f5de107faf045
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:32 -05:00
Dirk Brandewie ad5af93f25 x86: Add context value to loapic_mkstub and ioapic_mkstub macros
Add a context value to the ioapic and loapic mkstub macros to allow
the developer to specify a context value that will be passed on the
stack to the interrupt service routines.

All the invocations for the loapic_mkstub and ioapic_mkstub macros
have been changed to pass in 0 so there is no functional difference
ATM.  This change removes the need for drivers to have trampoline ISR
routines to pass a context vaule to their generic ISR routine.

This is the first step in getting rid of the hack where the driver
needs to look into the __initconfig_* linker objects.

Change-Id: I2c5eaa20d8cb5a42ef445762c426854be32c8452
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:24:31 -05:00