zephyr

Commit Graph

Author	SHA1	Message	Date
Carlo Caione	86bb739b7b	reserved_memory: Remove it and cleanup The reserved memory mechanism (sections and regions definition) has been entirely replaced, greatly extended and made it better by the work done on the zephyr,memory-region compatible. Since there is are no actual users, we can remove it. Signed-off-by: Carlo Caione <ccaione@baylibre.com>	2022-06-07 09:41:57 -07:00
Neil Armstrong	e636f149aa	dts: arm64: qemu-virt: switch to 64bit addressing in DT The qemu arm64 virt machine PCIe controller config space needs a 64bit adressing, so switch the entire qemu-virt-a53 and qemu_cortex_a53 board dts to address-cells & size-cells to 2 to accommodate for 64bit addresses. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>	2021-11-25 18:37:15 +01:00
Yuval Peress	a1f6d97978	drivers: syscon: Add support for multiple regions 1. Add support for multiple syscon entries (as a side effect, this also fixed syscon.c implementations which weren't being linked to their syscon.h counterparts). 2. Add support for different width registers in syscon. 3. Add tests for syscon Signed-off-by: Yuval Peress <peress@chromium.org>	2021-09-22 10:32:11 -04:00

Author

SHA1

Message

Date

Carlo Caione

86bb739b7b

reserved_memory: Remove it and cleanup

The reserved memory mechanism (sections and regions definition) has been
entirely replaced, greatly extended and made it better by the work done
on the zephyr,memory-region compatible.

Since there is are no actual users, we can remove it.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>

2022-06-07 09:41:57 -07:00

Neil Armstrong

e636f149aa

dts: arm64: qemu-virt: switch to 64bit addressing in DT

The qemu arm64 virt machine PCIe controller config space needs a
64bit adressing, so switch the entire qemu-virt-a53 and
qemu_cortex_a53 board dts to address-cells & size-cells to 2
to accommodate for 64bit addresses.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

2021-11-25 18:37:15 +01:00

Yuval Peress

a1f6d97978

drivers: syscon: Add support for multiple regions

1. Add support for multiple syscon entries (as a side effect, this also
   fixed syscon.c implementations which weren't being linked to their
   syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon

Signed-off-by: Yuval Peress <peress@chromium.org>

2021-09-22 10:32:11 -04:00

3 Commits