Commit Graph

7 Commits

Author SHA1 Message Date
Andre Guedes dacf54de68 i2c: Enable interrupts for QMSI shim driver
Due to an issue with the interrupt-based transfer API from QMSI driver,
the 'transfer' callback from the shim driver (i2c_qmsi_transfer) is
implemented with polling APIs. This is not ideal because we are not able
to sleep the current thread (so another task can be scheduled in) while
the i2c operation is carried out.

The interrupt issue with the QMSI driver has been solved then this patch
fixes the shim driver so it uses the interrupt-based API and adds extra
code to handle the thread synchronization.

Finally, this patch also moves all 'struct device' related definitions
from the bottom to the top of the i2c_qmsi.c file so the DEVICE_GET
macro can be used in transfer_complete() and removes the init.h include
since it is not needed anymore.

Change-Id: I7ef7ce4cea6fcc939e310e5fe12c406645f6a16e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-05 20:25:29 -05:00
Andre Guedes 4c3a1afbac i2c: Add multi controller support for QMSI shim driver
Currently, the I2C QMSI shim driver supports only the "I2C 0"
controller instance. This patch extends the driver so it supports
the "I2C 1" instance as well.

The controller instances can be enabled independently.

Change-Id: Ieb64df46816026f3f4fb262a1682c98ee36bedd5
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-05 20:25:29 -05:00
Benjamin Walsh d340d4cb3f device: use DEVICE_INIT everwhere
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().

Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh 0303d8cab9 device: rename SYS_DEFINE_DEVICE()
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.

Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh bfc27206b2 device: rename DECLARE_DEVICE_INIT_CONFIG()
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.

Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Andre Guedes 93831ebcce i2c: Fix i2c_qmsi_configure()
In the initial version of the I2C shim driver, the i2c clock gate was
enabled within i2c_qmsi_configure(). After some review rounds we decided
to move it to i2c_qmsi_init() but missed to remove the clk_periph_disable
call within i2c_qmsi_configure(). So this patch removes it.

Change-Id: Id45dba2e00a5649846d305399bc1b2b275063cb6
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-05 20:25:24 -05:00
Andre Guedes 959632684c i2c: Introduce QMSI I2C driver
This patch introduces the QMSI I2C driver which is simply a shim driver
based on I2C driver provided by QMSI BSP.

This initial version supports only I2C_0 controller in 'master' mode.
Due to some issues with qm_i2c_master_irq_transfer API, the driver uses
the polling APIs from QMSI. This means that the current thread doesn't
sleep (i.e. is not scheduled out) while the I2C transfer is carried out.
The qm_i2c_master_irq_transfer() issue is under investigation.

Below follows the missing features which will be addressed by a new
version of this patch or by upcoming patches.
  * Block the current thread until the I2C operation has actually
    completed.
  * Add support for multiple controllers.
  * Add support for slave mode.
  * Add support for suspend() and resume() APIs.

In order to enable this driver, the following options should be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory"
CONFIG_I2C=y
CONFIG_I2C_QMSI=y

Finally, due to the lack of proper support for Quark SE in QMSI 1.0.0,
this driver requires QMSI version greater than 1.0.0.

This driver has been tested only with Quark SE based boards.

Change-Id: I369992c7b5fe37f7e0b45be7f19e667ad1fca9ac
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-05 20:25:21 -05:00