Commit Graph

749 Commits

Author SHA1 Message Date
Kumar Gala 381c7bd519 dts: silabs: Add SoC level compatible
Add compatible for all the SoC dtsi files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-11 15:11:36 -06:00
Kumar Gala d3e27f518f boards: arm: nxp: imxrt: Fix SPI nodes on flexspi controller
Fix the QSPI and hyperflash nodes to be proper SPI children and expose
the address range for direct access as part of the controller's reg
region.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-11 13:12:18 -06:00
Aurelien Jarno 074f8a0a26 soc: nxp_imx: Add support for TRNG
Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2019-01-10 21:22:15 -06:00
Pushpal Sidhu 83bc07c826 dts: stm32l4r5: add i2c2 node
Add i2c2 node as it was removed from the parent file.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2019-01-10 07:08:34 -05:00
Wayne Ren 022f061632 board: add the initial support of iotdk
The initial support of iotdk which is a board based on Synopsys
ARC IoT SoC.

In this commit, it includes

* processor support
* UART driver

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-01-10 07:05:51 -05:00
Kumar Gala a4c3feced4 dts: flash: w25qxxdv: Add Device Tree Support for SPI FLASH w25qxxdv
Convert the w25qxxdv driver to use device tree for SPI device params.
Updated the Arduino 101 config to use device tree to specify the SPI
flash.  Update the arduino_101_sss to drop Kconfig support for the
w25qxxdv flash.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-09 10:26:10 -06:00
Christian Taedcke e6d5c4e3da soc: silabs_exx32: Add SWO logger support to EFM32PG12B
By default, after reset SWO signal is not connected to GPIO pin.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-01-09 15:30:59 +01:00
Piotr Mienkowski 8bed2d5e27 soc: silabs_exx32: Add SWO logger support
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-01-09 15:30:59 +01:00
Ashokkumar B 3c00d955f3 drivers: gpio: Add DTS support for Stellaris gpio driver.
* Add DTS support for gpio controller driver

Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
2019-01-08 13:30:26 -06:00
Piotr Mienkowski 973af2c8d7 dts: silabs: use 'aliases' to remove dts_fixup defines
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-01-08 11:56:02 -06:00
Erwan Gouriou 7f4eda501a dts: stm32f1: add uart5
Add uart5 nodes to stm32f1 series dts.
Provide matching dts_fixup add-on.

Signed-off-by: Chen Han <qq1433255094@outlook.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-04 10:07:54 -06:00
Michael Hope 42accf2e64 disk: add a SDHC card over SPI driver.
Features:

- Uses the SPI bus to communicate with the card
- Detects and safely rejects SDSC (<= 2 GiB) cards
- Uses the optional CRC support for data integrity
- Retries resumable errors like CRC failure or temporary IO failure
- Works well with ELMFAT
- When used on a device with a FIFO or DMA, achieves >= 310 KiB/s on a
  4 MHz bus

Tested on a mix of SanDisk, Samsung, 4V, and ADATA cards from 4 GiB to
32 GiB.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-12-30 16:24:10 -05:00
Erwan Gouriou a2668f587d dts: stm32f3: GPIO clocks are actually handled from AHB1 bus
Unlike stated in CMSIS file STM32F3 clock should be handled
from AHB1 bus. Update dtsi files accordingly.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-26 09:43:36 -05:00
Ioannis Glaropoulos b3299891ed dts: nordic: nrf91: DTS include headers for nRF9160 SOC
This commit introduces the main device tree header files (.dtsi)
for Nordic nRF9160 SOC, for both Secure and Non-Secure domains.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-12-21 21:03:55 +01:00
Armando Visconti b75a05cae6 driver: sensors: convert lsm9ds0_gyro to use information coming from dts
Convert lsm9ds0_gyro driver to get the device name as well as
i2c slave information and gpio info for triggers from device tree.
Updates the build_all test accordingly.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-12-20 12:35:46 +01:00
Ioannis Glaropoulos fe2f30ad4c dts: nordic: simplify definition of flash and sram sizes in dts
We only need to add the reg property in flash0 and sram0,
in the different DTS headers for the nRF SOCS. We do not
seem to need to define the nodes again. This commit applies
this simplification for flash and sram sizes definition.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-12-20 12:21:23 +01:00
Kumar Gala 90fbeb0a10 dts: nrf: Fix missed device tree warnings
Fix the following warning that shows up in some NRF device tree files:

	Warning (simple_bus_reg): /soc/pwm@4002D000: simple-bus unit
	address format error, expected "4002d000"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-19 08:26:22 -06:00
Kumar Gala e9a1d6493d dts: arm: nxp: imx: Use 'nxp,imx-{i,d}tcm' compatible
On i.mx6/7 the TCMU and TCML regions are specific to instruction or
data.  So use the nxp,imx-itcm for TCML and nxp,imx-dtcm for TCMU.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-19 08:14:33 -06:00
Kumar Gala f7a8ed75ae dts: Rename imx-rt-{i,d}tcm compatible
The imx-rt-{i,d}tcm bindings can actually be utilized on the i.MX6/7 as
well for the TCM{L,U} regions of memory as they are specific to
instruction or data.

So let's rename imx-rt-{i,d}tcm to imx-{i,d}tcm.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-19 08:14:33 -06:00
Armando Visconti 4446b16e24 driver: sensors: convert lsm9ds0_mfd to use information coming from dts
Convert lsm9ds0_mfd accel/magn driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-12-19 07:31:18 -06:00
Aurelien Jarno 9fe81e9165 dts: stm32f7: move flash0 node below flash-controller
Due to a bad timing in merging PR #10744 and PR #12083, the flash0 node
in stm32f756Xg.dtsi ended-up at the root of the device tree, while the
flash0 node it is trying to override in stm32f7.dtsi is now under
/soc/flash-controller.

This patch fixes that by moving it at the right location.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-18 09:38:57 +01:00
AJ Palmer 2f04dc69c0 boards: arm: nucleo_f756zg: Created new board and soc definition
Added board definitions for nucleo_f756zg. Features include gpio,
pinmux, uart (ST Zio, ST-Link and Arduino Uno v3 interfaces).

Added basic documentation and some soc definitions for the
stm32 f756XX soc.

Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
2018-12-17 11:35:27 -06:00
Maureen Helm 2346e318d3 dts: nxp: Add sram_l node to k64 dtsi
Adds a second sram node to the k64 device tree to acknowledge that the
additional sram is present in hardware, but deliberately not used in
zephyr until an outstanding issue is solved. The upper and lower sram
nodes are contiguous in the memory map, however the Cortex-M4
architecture does not support misaligned accesses across the boundary
between the two nodes.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-12-17 08:20:29 -06:00
Aurelien Jarno 6752b5df3f drivers: flash: add driver for STM32F7x series
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
Kumar Gala f022de6275 dts: stm32: Move usb PHY nodes out of SoC to fix warning
We currently get a number of warnings like:

	Warning (simple_bus_reg): /soc/otgfs_phy: missing or empty
	reg/ranges property

This is due to the usb phy nodes not have a reg property since they
don't have an mmio address associated with them.

Move the phy nodes out of the SoC node so their lack of a reg property
will not cause a warning.  This is similar to how Linux dts files
handle the phy nodes.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-14 09:39:09 -06:00
AJ Palmer bd8f15f555 stm32: dts: f7: added i2c4 node
Added i2c4 node to stm32f746.dtsi for stm32f74+ socs.
Added device tree fixup for i2c4.

Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
2018-12-14 07:22:51 -06:00
Kumar Gala 523932ccb0 dts: nrf: Fix device tree warnings
Fix the following warning that shows up in some NRF device tree files:

	Warning (simple_bus_reg): /soc/pwm@4001C000: simple-bus unit
	address format error, expected "4001c000"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-13 22:11:26 +01:00
Manivannan Sadhasivam f8ac865693 arm: stm32f4: Add UART4 pinmux definitions
Add missing UART4 pinmux definitions for STM32F4 series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-12-13 08:07:28 -06:00
Kumar Gala 3bc4ec9a24 dts: binding: Add mmio-sram binding
Add mmio-sram binding so we generate defines for on-chip SRAMs

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-13 07:25:51 -06:00
Gaute Gamnes 7b1ebb2116 dts: nrf: PWM device node added to nRF52 devices with yaml binding
1. PWM device node added with alias to all
   nRF52x DTSI files. 1 instance for
   nRF52810, 3 instances for nRF52832, and
   4 instance for nRF52840.
2. Added yaml binding for Nordic PWM node.

Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
2018-12-11 15:18:14 +01:00
Kumar Gala 4a038d7fce dts: Add binding for NXP i.MX RT itcm/dtcm memories
Add comptiable into the device tree and associated binding files for NXP
i.MX RT ITCM/DTCM memory regions.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-10 10:44:11 -06:00
Erwan Gouriou f6b014e6dd dts/arm: stm32f0: AHB2 but is not supported
AHB2 bus does not exist on STM32F0 series, replace with AHB1.

Fixes #11904

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-07 11:31:48 -05:00
Armando Visconti 7dbbb07f07 sensors: convert lis3dh to use information coming from dts
Convert lis3dh accelerometer driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-12-07 10:43:13 -05:00
Kumar Gala a24770bd12 sensor: lsm6dsl: Update DTS support
Now that we can support the same compatible but different bus types,
update the LSM6DSL support to utilize the same compatible for either I2C
or SPI.  We rename the i2c binding file to st,lsm6dsl-i2c.yaml just to
be a bit more clear.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-07 09:08:04 -06:00
Kumar Gala 1fe9a5b8d8 dts: ieee802154: cc1200: Add DTS support
Add a dts binding file for the cc1200 and move the Kconfig options for
SPI and GPIOs to DTS for the CC1200 driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-05 10:13:23 -06:00
Vijay Kumar B 392be3a8b3 drivers: ethernet: Add DTS support for Stellaris Ethernet controller.
* Add DTS support for Stellaris ethernet controller.
  * Add base DTS binding definition for Ethernet.
  * Add DTS binding definition for Stellaris ethernet controller.

Signed-off-by: Fadhel Habeeb <fadhel@zilogic.com>
Signed-off-by: Nirav Parmar <niravparmar@zilogic.com>
Signed-off-by: Vijay Kumar B <vijaykumar@zilogic.com>
2018-12-04 09:36:51 -06:00
Jan Tore Guggedal f291a520c2 dts: bindings: Add binding for ADXL372 using SPI
This patch adds dts/bindings/adi,adxl372-spi.yaml for
using ADXL372 on SPI bus instead of I2C which is used
in dts/bindings/adi,adxl372.yaml.

Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
2018-12-04 08:58:35 -06:00
Nathaniel Graff 078f6098e2 soc/sifive-freedom: Use DTS to generate PLIC addrs
Describe the MMIO register regions for the PLIC in the DTS instead of
hardcoded in soc.h

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-04 07:48:27 -06:00
Nathaniel Graff 8907c09fee soc/miv: Use DTS to generate PLIC addresses
Describe the MMIO register regions for the PLIC in the DTS instead of
hardcoded in soc.h.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-04 07:48:27 -06:00
Nathaniel Graff c48c94c9e6 dts/plic: Remove base_label from PLIC binding
Generate the fully-qualified DTS output. We'll fixup the defines on a
per-soc basis.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-12-04 07:48:27 -06:00
Markus Roppelt 804f164432 dts: arm: st: Add STM32L433 dtsi file
The STM32L433 has the same layout than the STM32L432, additionally it
has GPIOD, GPIOE, I2C2, USART3 and SPI2.

Also move USART3 and SPI2 out of stm32l4.dtsi since STM32L432 does not
have it.

Fixes #10909.

Signed-off-by: Markus Roppelt <markus.roppelt@gmx.de>
2018-12-04 07:45:18 -06:00
Yurii Hamann 2c363bddfe dts: arm: stm32: USART1 fix in device tree for STM32F7 series devices
Fixed mask value for RCC_APB1ENR register.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-12-03 11:36:01 -06:00
Peter A. Bigot 5313d4fb51 drivers: sensor: sht3xd: migrate GPIO from Kconfig to device tree
Replace Kconfig ALERT signal GPIO device and pin information with device
tree bindings.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2018-11-30 08:30:13 -08:00
Peter A. Bigot b7dc23984d drivers: sensor: sht3xd: migrate I2C from Kconfig to device tree
Replace Kconfig I2C bus and address information with device tree
bindings.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2018-11-30 08:30:13 -08:00
Armando Visconti 73a6f58dd4 sensors: convert lis2dh to use information coming from dts
Convert lis2dh accelerometer driver to get the device name as well
as i2c/spi slave information from device tree. Updates the build_all
test accordingly. (issue #11605)

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-11-30 08:36:29 -06:00
Sathish Kuttan 1b1c80256f dts: intel_s1000: add pinctrl to device tree
Add pinctrl node to Intel S1000 SoC device tree for I/O MUX selection

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-29 14:23:24 -08:00
Sathish Kuttan 23f11933b9 dts: intel_s1000: enable DTS for GPIO
Added GPIO to SoC device tree
Updated SoC DTS fixup
Removed Kconfig variables now replaced by DT

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-26 06:56:48 -08:00
Kumar Gala 582e676248 dts: arc: emsk: Remove emsk_dt.h and CONFIG options from dtsi
There are different interrupt numbers for R22 v R23.  Before this was
being handled via using Kconfig symbol CONFIG_BOARD_EM_STARTERKIT_R23 in
emsk_dt.h.  Since we want to remove use of Kconfig in dts we handle this
via different dtsi files and having the proper one included by the
proper board revision dts file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-23 09:13:55 -05:00
Kumar Gala 8d92653f26 dts: arc: emsk: Remove DT_APB_CLK_HZ from emsk_dt.h
As we want to remove emsk_dt.h we just fold the DT_APB_CLK_HZ into the
emsk.dtsi.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-23 09:13:55 -05:00
Kumar Gala 7feb430b38 dts: arc: emsk: Remove DT_{I,D}CCM_SIZE from emsk_dt.h
Towards removing Kconfig from DTS we need to move setting of the sizes
of ICCM/DCCM into the SoC specific DTS files and out of emsk_dt.h

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-23 09:13:55 -05:00