Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.
Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.
To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:
- emit macros for all existing nodes in gen_defines.py, regardless
of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Make drivers multi-instance wherever possible using DT_INST_FOREACH.
This allows removing DT_HAS_DRV_INST in favor of making drivers just
do the right thing regardless of how many instances there are.
There are a few exceptions:
- SoC drivers which use CMake input files (like i2c_dw.c) or otherwise
would require more time to convert than I have at the moment. For the
sake of expediency, just inline the DT_HAS_DRV_INST expansion for
now in these cases.
- SoC drivers which are explicitly single-instance (like the nRF SAADC
driver). Again for the sake of expediency, drop a BUILD_ASSERT in
those cases to make sure the assumption that all supported SoCs have
at most one available instance is valid, failing fast otherwise.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Fixup cases of GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(n, ngpios))
to use GPIO_PORT_PIN_MASK_FROM_DT_INST(n) instead.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Include gpio_utils.h to fix a build failure:
gpio_pca95xx.c:490:20: warning: implicit declaration of
function 'GPIO_PORT_PIN_MASK_FROM_NGPIOS'
[-Wimplicit-function-declaration]
gpio_pca95xx.c:490:20: error: initializer element is not constant
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(
DT_INST_##inst##_NXP_PCA95XX_NGPIOS), \
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Use gpio_pin_t uniformly when passing pin indexes to the driver. Use
gpio_flags_t uniformly when passing flags to the driver. Change name
of pin configuration function in API function table to be consistent
with other API functions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The only remaining port operations have dedicated API function table
entries. Remove the defines for access op (mode), and remove support
for access op from all implementations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The last external reference to these was removed when the pin
write/read functions were deprecated. Remove the syscall support, API
function table entries, and implementation from all drivers.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This factors the common bits of device declaration into macros
so it would be easier to add new instances.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove support for GPIO_ACCESS_BY_PORT in the config function
as configuration by port is going away.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Since the GPIO expander is a I2C device, any read/write to
the registers has high latency. Therefore, semaphore is
introduced to prevent multiple threads to manipulate
the GPIOs at the same time.
Also make sure that we are not doing I2C transactions
within ISRs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Only update the internal register cache after successful write,
or else it would get out of sync with hardware.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The register pair for each port in the GPIO expander are
port 0 first then port 1. This would not work for big
endian systems with the u16_t port value. So need to
swap the byte ordering on such system.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The structures defined in the header file are only used by
the driver source file, and should not be used by others.
So roll the header file into the source file so it won't
get #include.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use I2C burst write to write 2 bytes to each pair of registers
instead of 2 separate transactions of writing 1 byte.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
PCA95XX is a series of compatible I2C-based GPIO expanders,
with common registers on input/output, polarity and configuration.
This renames the original PCAL9535A driver to PCA95XX to indicate
that it can support this series. Additional features on variants
are guarded by kconfigs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Martí Bolívar