Commit Graph

24 Commits

Author SHA1 Message Date
Ulf Magnusson c5839f834b kconfig: Remove assignments to CONFIG_<arch> syms and hide them
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.

CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.

Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:

1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
   turn the CONFIG_<arch> symbols into invisible
   (promptless/nonconfigurable) symbols instead.

   Getting rid of the choice allows the symbols to be 'select'ed (choice
   symbols don't support 'select').

2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
   This makes sense since you know the architecture if you know the SoC.

   Put the select on the SOC_* symbol instead for boards that don't have
   a SOC_SERIES_*.

3. Remove all assignments to CONFIG_<arch> symbols. The assignments
   would generate errors now, since the symbols are promptless.

The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.

See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.

This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-08 00:50:08 -06:00
Ulf Magnusson 98d02613a3 kconfig: Remove assignments to promptless CPU_MINUTEIA symbol
CPU_MINUTEIA has no prompt. Assignments in configuration files have no
effect on symbols without prompts. A prompt means the symbol is
user-configurable.

CPU_MINUTEIA is instead enabled indirectly through being selected by
other symbols.

Detected through some work-in-progress improved error checking.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-09 16:41:32 -05:00
Charles E. Youse 3038209695 drivers/timer/hpet.c: migrate to devicetree
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.

Fixes: #18657

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-17 22:37:09 +08:00
Andrew Boie c3b3aafaec x86: generate page tables at runtime
Removes very complex boot-time generation of page tables
with a much simpler runtime generation of them at bootup.

For those x86 boards that enable the MMU in the defconfig,
set the number of page pool pages appropriately.

The MMU_RUNTIME_* flags have been removed. They were an
artifact of the old page table generation and did not
correspond to any hardware state.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-08-07 12:50:53 -07:00
Andrew Boie bd709c7322 x86: support very early printk() if desired
Adapted from similar code in the x86_64 port.
Useful when debugging boot problems on actual x86
hardware if a JTAG isn't handy or feasible.

Turn this on for qemu_x86.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-08-02 00:29:21 -07:00
Charles E. Youse 15223dd936 arch/x86/Kconfig: remove CONFIG_IA32_LEGACY_IO_PORTS
Hygiene. This option is never referenced by any code.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-14 05:49:13 -04:00
Andrew Boie 87d1f0682b boards: qemu_x86: properly enable XIP
The '#if XIP' in the DTS file never worked properly,
causing the QEMU build to think it has much more RAM
then it actually has. If RAM overflowed, this would not
be caught by the build, instead there would be strange
crashes when the data copy takes place.

The QEMU targets themselves are not XIP, everything
is actually RAM, but the first 4 megabytes are
considered to be a memory-mapped flash region. This
is done to ensure that the XIP data copying infrastructure
doesn't bit-rot on x86. We are at the point where
a lot of things depend on this, so just select it in
the board Kconfig instead of enabling in the
defconfigs.

Fixes: #15835

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-05-03 22:38:22 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Andrew Boie 2d9bbdf5f3 x86: remove support for non-PAE page tables
PAE tables introduce the NX bit which is very desirable
from a security perspetive, back in 1995.

PAE tables are larger, but we are not targeting x86 memory
protection for RAM constrained devices.

Remove the old style 32-bit tables to make the x86 port
easier to maintain.

Renamed some verbosely named data structures, and fixed
incorrect number of entries for the page directory
pointer table.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-05 20:51:21 -08:00
Anas Nashif d9ec5eca24 hpet: remove HPET_TIMER_*_EDGE and HPET_TIMER_LEVEL_*
This option is not used anywhere and was removed when the hpet driver
was rewritten.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-01-22 07:45:22 -05:00
Anas Nashif 1d11945739 hpet: remove unused HPET_TIMER_LEGACY_EMULATION
This option is not used anywhere and was removed when the hpet
driver was rewritten.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-01-22 07:45:22 -05:00
Andrew Boie 1c5642a402 boards: x86: don't turn on mem protection
This is not enabled at the board level.
tests/Kconfig turns this on for test cases.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-11-28 15:33:11 -08:00
Andy Ross 225c74bbdf kernel/Kconfig: Reorgnize wait_q and sched algorithm choices
Make these "choice" items instead of a single boolean that implies the
element unset.

Also renames WAITQ_FAST to WAITQ_SCALABLE, as the rbtree is really
only "fast" for large queue sizes (it's constant factor overhead is
bigger than a list's!)

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-07-03 17:09:15 -04:00
Andy Ross f8288abd22 boards/qemu_x86: Enable fast scheduler options
This target is already using the rbtree as part of CONFIG_USERSPACE,
so it incurs no code size overhead (actually it's a little smaller)
when using the scalable scheduler and waitq implementations.

The change also gets us test coverage of those choices on a default CI
target.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-05-19 07:00:55 +03:00
Andrew Boie 1c5e6b2d3e qemu_x86: enable CONFIG_DEBUG_INFO
Minimal performance cost and will enable runtime stack traces.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-03-16 14:12:15 -07:00
Adithya Baglody f677caef2d x86: MMU: Set PAE page tables for QEMU as default.
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.

JIRA:ZEP-2511

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-25 10:39:47 -07:00
Andrew Boie 911be99edf Revert "x86: MMU: Set PAE page tables..."
This reverts commit
0b6bc24089.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-24 12:45:59 -07:00
Adithya Baglody 0b6bc24089 x86: MMU: Set PAE page tables for QEMU as default.
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.

JIRA:ZEP-2511

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-23 10:13:07 -07:00
Andrew Boie ec896b9796 qemu_x86: enable userspace and app memory
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-13 12:56:14 -07:00
Andrew Boie 17876c857a qemu_x86: enable HW stack protection properly
CONFIG_X86_STACK_PROTECTION is now a hidden option enabled by
CONFIG_HW_STACK_PROTECTION.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-11 12:26:54 -07:00
Andrew Boie 19fdf4d6f8 qemu_x86: enable MMU stack protection by default
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-25 11:32:36 -04:00
Andrew Boie dbd705228b qemu: enable MMU by default
We have lots of RAM, this helps catch bugs.
Enable XIP as well, this used to be turned on but was
shut off for some reason.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-10 11:44:56 -07:00
Anas Nashif 7318fa22a2 boards: qemu: enable test random generator
This should be a default option for this board which would allow us to
remove it from many sample configurations that can be then used for
other boards.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-05 12:43:13 -04:00
Kumar Gala 8d35760fec board: organize boards based on architecture
Introduce an architecture sorting of boards.  This is to allow for
easier maintenance going forward as the number of boards grows.  It
will be easier for any scripts to know the board/arch mapping without
having to maintain an explicit list of what boards are associated with
which arch.  We can also do things like have architecture maintainers
cover reviews and branches for arch/${ARCH} and boards/${ARCH} going
forward.

Change-Id: I02e0a30292b31fad58fb5dfab2682ad1c5a7d5a7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-10-24 19:59:42 +00:00