This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.
Fixes: #18657
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Removes very complex boot-time generation of page tables
with a much simpler runtime generation of them at bootup.
For those x86 boards that enable the MMU in the defconfig,
set the number of page pool pages appropriately.
The MMU_RUNTIME_* flags have been removed. They were an
artifact of the old page table generation and did not
correspond to any hardware state.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adapted from similar code in the x86_64 port.
Useful when debugging boot problems on actual x86
hardware if a JTAG isn't handy or feasible.
Turn this on for qemu_x86.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The '#if XIP' in the DTS file never worked properly,
causing the QEMU build to think it has much more RAM
then it actually has. If RAM overflowed, this would not
be caught by the build, instead there would be strange
crashes when the data copy takes place.
The QEMU targets themselves are not XIP, everything
is actually RAM, but the first 4 megabytes are
considered to be a memory-mapped flash region. This
is done to ensure that the XIP data copying infrastructure
doesn't bit-rot on x86. We are at the point where
a lot of things depend on this, so just select it in
the board Kconfig instead of enabling in the
defconfigs.
Fixes: #15835
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
PAE tables introduce the NX bit which is very desirable
from a security perspetive, back in 1995.
PAE tables are larger, but we are not targeting x86 memory
protection for RAM constrained devices.
Remove the old style 32-bit tables to make the x86 port
easier to maintain.
Renamed some verbosely named data structures, and fixed
incorrect number of entries for the page directory
pointer table.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Make these "choice" items instead of a single boolean that implies the
element unset.
Also renames WAITQ_FAST to WAITQ_SCALABLE, as the rbtree is really
only "fast" for large queue sizes (it's constant factor overhead is
bigger than a list's!)
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This target is already using the rbtree as part of CONFIG_USERSPACE,
so it incurs no code size overhead (actually it's a little smaller)
when using the scalable scheduler and waitq implementations.
The change also gets us test coverage of those choices on a default CI
target.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.
JIRA:ZEP-2511
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.
JIRA:ZEP-2511
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
We have lots of RAM, this helps catch bugs.
Enable XIP as well, this used to be turned on but was
shut off for some reason.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This should be a default option for this board which would allow us to
remove it from many sample configurations that can be then used for
other boards.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Introduce an architecture sorting of boards. This is to allow for
easier maintenance going forward as the number of boards grows. It
will be easier for any scripts to know the board/arch mapping without
having to maintain an explicit list of what boards are associated with
which arch. We can also do things like have architecture maintainers
cover reviews and branches for arch/${ARCH} and boards/${ARCH} going
forward.
Change-Id: I02e0a30292b31fad58fb5dfab2682ad1c5a7d5a7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Charles E. Youse