Commit Graph

2476 Commits

Author SHA1 Message Date
Ulf Magnusson 3ac3216d89 soc: defconfig: Consistently quote string defaults
In preparation for introducing a warning.

Unquoted string defaults work through a quirk of Kconfig (undefined
symbols get their name as their string value), but look confusing. It's
done inconsistently now too.

Suggested by Kumar Gala.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-05-26 19:17:48 -04:00
Leandro Pereira edd18c8f5a arch: x86: Better document that CR0.WP will also be set when CR0.PG is
Setting bit CR0.WP (bit 16) will inhibit supervisor threads from
writing to RO pages.  It's a necessary flag to be set, and the constant
name CR0_PAGING_ENABLE didn't reflect the fact that the 16th bit was
being set.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-05-26 19:09:33 -04:00
Aurelien Jarno a9fe133d07 arch: arm: fix a typos in Kconfig file
Architectue => Architecture

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-05-26 19:07:55 -04:00
Ioannis Glaropoulos 0825d0cd19 arch: arm: fix undefined variable bug
This commit fixes a compilation bug for an undefined variable
(mmfar), which is only conditionally defined. Instead of mmfar
we use the ARM register value directly.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-05-26 15:50:56 -04:00
Anthony Kreft 94a22daf36 arch: arm: STM32L053X8 support
Add support for the STM32L053X8 on the NUCLEO-L053R8 board.

Signed-off-by: Anthony Kreft <anthony.kreft@gmail.com>
2018-05-25 13:06:18 -05:00
Gil Pitney 9d2f370ddb boards: cc3220sf_launchxl: Make cc3220sf XIP by default
Previously, there was no easy command-line solution for loading
a Zephyr program to (internal) flash.
So, the default development method was to load via gdb/openocd
to SRAM and debug from there, thus making the cc3220sf platform
non-XIP (CONFIG_XIP=n) by default.

With new openocd v 1.10 updates from TI (git.ti.com/sdo-emu),
the image can now be flashed and debugged via gdb/openocd,
so the default will be changed to XIP (CONFIG_XIP=y).

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2018-05-25 11:59:00 -05:00
Jun Li 8cc002e657 soc: stm32f1: add port uart4
Enable supporting UART4 on STM32F107 and STM32F103Xe SoCs.
Modified stm32f1/dts.fixup for replacing USART with UART.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2018-05-25 11:58:20 -05:00
Ilya Tagunov 1e6d827a53 drivers: serial: stm32: add LPUART support for L0/L4 series
LPUART (Low-power UART) peripheral is just like ordinary U(S)ART
which lives in a separate clock/power domain.
Therefore already existing code could be reused as is
almost entirely.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-05-25 11:54:42 -05:00
Ilya Tagunov fd26514a4d drivers: serial: stm32: rework macros and fixups
STM32Lx LPUART peripherals do not fit well into existing U(S)ART
port numbering scheme, so there will be two separate namespaces
in Kconfig: one for U(S)ARTs and one for LPUARTs.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-05-25 11:54:42 -05:00
Andy Ross 3a0cb2d35d kernel: Remove legacy preemption checking
The metairq feature exposed the fact that all of our arch code (and a
few mistaken spots in the scheduler too) was trying to interpret
"preemptible" threads independently.

As of the scheduler rewrite, that logic is entirely within sched.c and
doing it externally is redundant.  And now that "cooperative" threads
can be preempted, it's wrong and produces test failures when used with
metairq threads.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-05-25 09:40:55 -07:00
Ioannis Glaropoulos 49f0dabfcc arch: arm: refactor default _FaultDump to provide fatal error code
Refactor the _FaultDump of the default debug-level (2) to
provide the error code that indicates the fatal error reason.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-05-25 09:46:24 -05:00
Ioannis Glaropoulos d54dc42af9 arch: arm: refactor FAULT_DUMP to retrieve the fatal error reason
Refactor FAULT_DUMP macro to obtain and store the fatal error
reason. Make non-default version of FAULT_DUMP (i.e. with
CONFIG_FAULT_DUMP level 1) to retrieve the default reason
for fatal errors (_NANO_ERR_HW_EXCEPTION).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-05-25 09:46:24 -05:00
Ioannis Glaropoulos d2c8a20560 arch: arm: document non-returning fatal handlers
Document that execution does not return from
_NanoFatalErrorHandler and _SysFatalErrorHandler.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-05-25 09:46:24 -05:00
Wayne Ren 876a9af9d5 arch: arc: fix the bug in register clear for USER_SPACE
* blink, fp should not be always cleared
* clean up code format
* use a better way to save and restore ER_SEC_STAT

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-25 15:56:15 +02:00
Wayne Ren 77eb883ab0 arch: arc: fix the bug in exception return for secure mode
* current codes use a faked interrupt return to do a thread switch
  in exception return.
* so the different between exception return and interrupt return
  should be carefully considered.
* when secure is enabled, the sec_stat should also be pushed in
  exception entry.
* when secure is enabled, SEC_STAT.IRM must be configured corrrectly
  for interrupt return.
* For the case of faked interrupt return in exception return, the
  correct value of SEC_STAT.IRM comes from ER_SEC_STAT.ERM.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-25 15:56:15 +02:00
Andrew Boie 6f6acb4667 arm_mpu: reduce boot MPU regions for various soc
The PPB, Peripheral, and any other I/O regions have been
removed, the Shareable options are only important with
unlocked dual cores. Just use the background mapping,
which is RWX for supervisor and no access for user mode.

The flash region needs to be kept to indicate read-only
policy. The RAM regions need to be kept to disable execution.

Fixes #6896

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-05-24 19:19:07 -04:00
Andrew Boie d9a227c19c arm: st_stm32: reduce boot MPU regions
The PPB and Peripheral regions have been removed,
the Shareable options are only important with unlocked
dual cores. Just use the background mapping.

The flash region needs to be kept to indicate read-only
policy. The RAM regions need to be kept to disable execution.

Related to #6896 and #7877

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-05-24 15:31:00 -07:00
Leandro Pereira ecadd465a2 arch: x86: Allow disabling speculative store bypass
In order to mitigate against Spectre V4, add an option that will, at
boot time, verify if the CPU supports the SPEC_CTRL MSR; if so, it'll
attempt to disable the feature.

More information can be found in chapter 4 (Speculative Store Bypass
Mitigation) of the "Speculative Execution Side Channel Mitigations"
document, version 2, published by Intel: https://goo.gl/nocTcj

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-05-24 13:07:12 -04:00
Leandro Pereira fb0fba91a5 arch: x86: Rename CPU_NO_SPECTRE to CPU_NO_SPECTRE_V2
There's a new known variant, so make it clear what this one is for.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-05-24 13:07:12 -04:00
Ioannis Glaropoulos 46a3e8bdf0 arch: arm: fix fault status register bitfield masks
This commit fixes the bitfield masks for the Cortex-M
fault status registers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-05-24 11:31:54 -05:00
Tomasz Bursztyka 2bfcb8496d arch/arc: UART QMSI's baudrate is not present in Kconfig anymore
It's generated through dts.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-24 11:58:17 -04:00
Aurelien Jarno 509e6964cc arch: stm32l432: add support for USB controller
The STM32L432 SoC has a standard non-OTG USB controller. Add an entry
for it in stm32l432.dtsi and add the corresponding DTS fixup entries.
The controller is kept disabled and should be enabled at the board
level.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-05-24 09:42:30 -05:00
Aurelien Jarno dc01b99068 arch: stm32l4: only enable USB OTG on SoCs supporting it
USB OTG is currently enable for the whole STM32L4 family, while only a
few of them actually support it:

- STM32L475, STM32L476 and STM32L496 have an OTG controller
- STM32L432, STM32L433 and STM32L452 have an USB controller
- STM32L431, STM32L451 and STM32L471 do not have any USB controller

Fix that by moving the DT entry from stm32l4.dtsi to stm32l475.dtsi
and by adding a #ifdef #endif around the corresponding DTS fixup
entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-05-24 09:42:30 -05:00
Kumar Gala 8321b6b64f arch: arm: nxp: Fixup HAS_MCUX_RTC
When the RTC support get added we had a select on HAS_RTC, however this
Kconfig symbol didn't exist.  Clean this up to match the pattern of
HAS_MCUX_RTC.  The driver now depends on that and the SoC selects it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-24 08:21:24 -05:00
Ulf Magnusson 5b20350a72 gdb_server: Remove leftover testing and x86 parts
gdb_server was removed in commit 0f669132a0 ("kernel: remove
gdb_server"), but still has a testcase that sets CONFIG_GDB_SERVER=y,
and some code in arch/x86/debug.

Remove the leftover parts. This also gets gets rid of undefined
references to the CONFIG_GDB_SERVER symbol.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-05-24 08:10:21 -04:00
Erwan Gouriou 9559277094 arch: stm32: Remove unsupported MPU options
Some code was developped around MPU support in ealy stage
of feature introduction. This code was gated under MPU_ENABLE
flag which does not exist and hence code has never been
enabled nor tested.
Since there has been futher MPU development since then, it seems
safer to simply remove that code and associated Kconfig symbols
to avoid that someone starts using it while it was not part of
MPU development track.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-05-24 08:04:00 -04:00
Kumar Gala 33628f1c47 arch: arc: userspace: Fix typo in comment
CONFIG_INIT_STACK should be CONFIG_INIT_STACKS

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-23 17:57:06 -04:00
Kumar Gala 6ef2f76b2f arch: arm: thread.c: Fix typo in comment
Changed CONFIG_BUIILTIN_STACK_GUARD to CONFIG_BUILTIN_STACK_GUARD.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-23 17:57:06 -04:00
Kumar Gala 7faac6a761 arch: arm: atmel_sam: Add quotes to strings in Kconfig
While not technically required, its cleaner to ensure that strings
defaults are quoted.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-23 17:57:06 -04:00
David B. Kinder 44383a394b doc: fix misspellings in Kconfig files
Found some misspellings missed during normal reviews.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-23 16:57:20 -04:00
Leandro Pereira d4221f9a71 arch: x86: Rename MSR-handling functions to conform to convention
Rename _MsrRead() and _MsrWrite() to _x86_msr_read() and
_x86_msr_write() respectively.

Given that these functions are essentially implemented in assembly.
make them static inline.  They can be inlined by the compiler quite
well, most of the time incurring in space savings due to better
handling of the cobbled registers.

Also simplifies the inline assembly, using constraints instead of
moving registers ourselves.  Should shave off a few bytes from code
using these functions.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-05-23 14:38:22 -04:00
Carles Cufi 5b37cd7346 arch: arm: swap: Remove old context switch code
Remove unused context switch code from the helper assembly file that
manages the SuperVisor Call invocations (SVCs). This is no longer in use
in the code, since all calls to __swap() now go through PendSV directly.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-05-23 09:34:12 -07:00
Andrew Boie 99f36de0a1 arm: userspace: fix initial user sp location
The initial user stack pointer gets rounded to STACK_ALIGN_SIZE,
which can be much finer granularity than MPU regions. With
certain stack size values passed to k_thread_create(), the stack
pointer can be set past the defined region for the user thread's
stack, causing an immediate MPU fault.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-05-22 15:59:07 -07:00
Andrew Boie 9731a0cce9 arm: syscalls: fix some register issues
Upon return from a syscall handlers, the r1, r2, and r3 registers
could contain random kernel data that should not be leaked to user
mode. Zero these out before returning from _arm_do_syscall().
Fixes #7753.

The invocation macros need a clobber if r1, r2, or r3 are not used
to carry syscall arguments. This is a partial fix for #7754 but
there appear to be other issues.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-05-22 15:59:07 -07:00
Sebastian Bøe cde6bef778 kconfig: Drop support for CONFIG_TOOLCHAIN_VARIANT
The Kconfig option TOOLCHAIN_VARIANT (not to be confused with
ZEPHYR_TOOLCHAIN_VARIANT) is a legacy configuration option that has
very few use-cases and can easily be dropped.

It's functionality is easily covered by CONFIG_X86_IAMCU and
ZEPHYR_TOOLCHAIN_VARIANT.

This commit removes all references of it from Zephyr.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-05-22 11:15:36 -04:00
Savinay Dharmappa 2ebb6a1fee dts: intel_s1000: use dts to set i2c0 priority.
patch removes Kconfig used i2c0 priority, instead use the
macro generated from dts.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 09:30:14 -04:00
Savinay Dharmappa 6701d44967 dts: xtensa: Fix build error due to dts changes for ns16550 driver.
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 08:51:59 -04:00
Kumar Gala edf7c4fd08 arch: arm: kw41z: Set DTS fixup for CONFIG_RTC_0_NAME
Recent change to RTC core now gets CONFIG_RTC_0_NAME from device tree.
So we need a fixup for KW41Z for that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-21 14:06:57 -05:00
Maureen Helm b5db62ca94 frdm_kl25z: Remove incorrect references to spi
The kl25z does not have the same spi hardware as the k64f and therefore
cannot use the same spi driver. Remove all references to spi for the
kl25z soc and frdm_kl25z board until we have a valid spi driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-21 13:26:10 -05:00
Alexander Wachter e73637af24 boards: stm: Add CAN support for stm32f072b micro controller
This commit adds the can device to the stm32f072b device tree and pinmux

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-05-19 20:19:30 +02:00
Tomasz Bursztyka 60d509f3d7 arch: Use dts to set i2c priorities for quark_se/quark_d2000
Fix the qmsi i2c driver and the relevant SoCs accordingly.
Also applying relevant changes on quark_se_c1000_ss as it can use i2c
qmsi driver as well along with qmsi ss i2c driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka ed26b95746 drivers/gpio: Removing dts generated options in QMSI Kconfig
Now that all arch using QMSI gpio driver are generating the right
settings through DTS, these options can be removed from Kconfig.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka bd9706cd9b arch/arc: Use dts to set gpio priorities for quark_se_c1000_ss
Fix the qmsi ss gpio driver accordingly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 61ef30d10e drivers/uart: Use dts to set uart options for ns16550 driver
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 17c6456678 drivers/uart: Use dts to set uart priorities for QMSI driver
Fix the qmsi uart driver and relevant SoCs accordingly.
Also: using config for irq everwhere relevantly and not an hardcoded
value in the driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 250c4a87ed arch: Use dts to set rtc priorities for Intel quark, x86 and arc
Get the name generated through dts as well.
Fix the rtc driver and relevant SoCs accordingly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 53f91976b1 arch/x86: Use dts to set gpio options for quark_se and quark_d2000
Get the name and irq flags generated through dts as well.
Fix Kconfig for the gpio driver accordingly.

Irq priority is not set by dts for D2000 as it's irq controller does
not support it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Ramakrishna Pallala eb0aaca64d lib: posix: Add Posix Style File System API support
Add IEEE 1003.1 Posix Style file system API support.
These API's will internally use corresponding Zephyr
File System API's.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-05-18 13:32:36 +03:00
Savinay Dharmappa 2948924655 dts: nios2-qemu: add device tree support
Add device tree support for nios2-qemu

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-17 14:09:15 -07:00
Savinay Dharmappa 8f908f38e0 dts: nios2f: Add device tree support
Add device tree support for nios2f soc

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-17 14:09:15 -07:00