Add configuration, dts and documentation for the MINI-M4 for
STM32 board based on the STM32F415RG SoC.
See https://www.mikroe.com/mini-stm32f4 for more details.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2 identical packages were defined for stm32f412 SoC, invariant "g".
Merge them in new sinclge stm32f412Xg.dtsi.
Update matching boards accordinlgy.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
A parallel PCI implementation ("pcie") is added with features for PCIe.
In particular, message-signaled interrupts (MSI) are supported, which
are essential to the use of any non-trivial PCIe device.
The NS16550 UART driver is modified to use pcie.
pcie is a complete replacement for the old PCI support ("pci"). It is
smaller, by an order of magnitude, and cleaner. Both pci and pcie can
(and do) coexist in the same builds, but the intent is to rework any
existing drivers that depend on pci and ultimately remove pci entirely.
This patch is large, but things in mirror are smaller than they appear.
Most of the modified files are configuration-related, and are changed
only slightly to accommodate the modified UART driver.
Deficiencies:
64-bit support is minimal. The code works fine with 64-bit capable
devices, but will not cooperate with MMIO regions (or MSI targets) that
have high bits set. This is not needed on any current boards, and is
unlikely to be needed in the future. Only superficial changes would
be required if we change our minds.
The method specifying PCI endpoints in devicetree is somewhat kludgey.
The "right" way would be to hang PCI devices off a topological tree;
while this would be more aesthetically pleasing, I don't think it's
worth the effort, given our non-standard use of devicetree.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Right now only numerical values are printed which must
be looked up in the Designware ARCv2 ISA Programmer's
Reference, which is not public.
Add a non-default Kconfig to print more information at
the expense of footprint, and enable it for all the simulator
targets.
We only print code/parameter details for machine check and
protection violations, more may be added later as desired.
This should cover all the exceptions we commonly encounter
for memory protection.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
SPI is not normally enabled, but some tests assume that there's a device
available. Conditionally enable SPI_2 which is associated with the
on-board flash.
Closes#15374
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Remove 'counter' as a supported feature on several NRF boards as these
boards fail to build tests/drivers/counter/counter_basic_api. This is
due to the fact that we either need explicit board conf files for the
test or have the counter driver enabled via Kconfig.
Fixes#15460
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
for SDK 0.10.0, it consumes more stack size when coverage
enabled, so adjust stack size to fix stack overflow issue.
Fixes: #15206.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Fixes broken CC2520 on quark_se_c1000_devboard configuration after
commit 25d17db.
Fixes#15070
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This is a follow up to commit 436c4262da.
By default the channel 0 of pwm0 is set to the pin that drives led0.
Since the LED is active high, the inversion of polarity is incorrect.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
write_buf and flash_content should be defined as global inside
main. Otherwise Python treats them as local variables and ends
up throwing an error because it thinks they are being used
without being defined.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
for SDK 0.10.0, it consumes more stack size when coverage enabled
on qemu_x86 and mps2_an385 platform, adjust stack size for most of
the test cases, otherwise there will be stack overflow.
Fixes: #14500.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
For some reason we dropped the simulation keyword and this platform is
not running any tests, we are just building the tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Rename reserved function names in arch/ subdirectory. The Python
script gen_priv_stacks.py was updated to follow the 'z_' prefix
naming.
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
* the nsim host timer does not work as expected,
disable it, use cycle count to simulate timer tick
* optmize the freq definition of nsim_em
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
On Clear Linux, the CFLAGS is set and defines a number of aggressive
checks and optimizations. This causes a build failure when generating a
GRUB2 boot loader image using the 'build_grub.sh' script.
Unsetting it within the script allows it to proceed and successfully
build a functional GRUB2 boot loader image to be used with Zephyr.
Fixes: #14289
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Updates the 96b_nitrogen board document to link to the new debugging
guide instead of the opensda page.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the usb_kw24d512 board
document to leverage the new debugging guide covering debug probes and
host tools.
This board does not have an OpenSDA microcontroller, therefore the only
debug probe currently supported is the external J-Link.
Updates the flashing section to reflect that the ``flash`` build system
target is now supported.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the lpcxpresso54114
board document to leverage the new debugging guide covering debug probes
and host tools.
This board supports the LPC-Link2 J-Link onboard debug probe.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the hexiwear board
documents to leverage the new debugging guide covering debug probes and
host tools.
Recommends the OpenSDA J-Link debug probe because the k64 and kw40z
share the same OpenSDA microcontroller, and the kw40z requires Segger
RTT for a console. It is possible to use daplink firmware for the k64,
however it is not recommended because it requires switching the firmware
back to jlink to access the kw40z.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The hexiwear_k64f and hexiwear_kw40z share the same OpenSDA
microcontroller on the hexiwear docking station, so make the jlink the
default firmware on both for consistency. We use jlink instead of
daplink by default because hexiwear_kw40z can only use Segger RTT for
the console (there is no UART available).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The frdm_kw41z board was originally configured in zephyr to use the
jlink runner by default because pyocd didn't yet support the kw41z soc.
Support for kw41z was added in pyocd v0.9.0, so we can now default to
daplink firmware and pyocd.
Now all freedom boards in zephyr consistently use daplink and pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the freedom board
documents to leverage the new debugging guide covering debug probes and
host tools.
These boards support OpenSDA DAPLink and OpenSDA J-Link onboard debug
probes. They can also support an external J-Link probe, but this
requires board modifications (cutting traces) and is therefore not
documented.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the mimxrt1060_evk and
mimxrt1064_evk board documents to leverage the new debugging guide
covering debug probes and host tools.
Neither of these boards have OpenSDA J-Link board-specific firmware,
therefore the only debug probe currently supported is the external
J-Link.
Updates the flashing section to reflect that the ``flash`` build system
target is now supported.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the mimxrt1020_evk and
mimxrt1050_evk board documents to leverage the new debugging guide
covering debug probes and host tools.
These boards support both the OpenSDA J-Link onboard debug probe and the
J-Link external debug probe.
Corrects an error linking to the wrong OpenSDA J-Link firmware.
Updates the flashing section to reflect that the ``flash`` build system
target is now supported.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
* the original configurations are configured with stack checking
* the new configurations are configured with mpu stack guard
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The GPIO driver is required by this board's initialization code, hence
it is forced to be enabled always, not only enabled by default like on
other boards equipped with an nRF SoC.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This patch enables the GPIO driver by default on all boards equipped
with an nRF SoC (all boards having `CONFIG_SOC_FAMILY_NRF=y` in their
`_defconfig` file).
In vast majority of cases the driver is needed, so it is more
convenient to enable it at board level than in particular
applications.
And if the driver is undesired for some reason, it can be still
disabled in the application config.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Set FLASH_LOAD_OFFSET correctly (accounting for Nordic MBR) when
BOARD_HAS_NRF5_BOOTLOADER is defined and we're not compiling MCUboot.
MCUboot will select USE_CODE_PARTITION, which will make it link
correctly regardless of which board DTS is used (stock/debugger).
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Discovered with pylint3.
Use the placeholder name '_' for unproblematic unused variables. It's
what I'm used to, and pylint knows not to flag it.
Python tip:
for i in range(n):
some_list.append(0)
can be replaced with
some_list += n*[0]
Similarly, 3*'\t' gives '\t\t\t'.
(Relevant here because pylint flagged the loop index as unused.)
To do integer division in Python 3, use // instead of /.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
nrf52840_pca10056 and nrf52_pca10040 was enabling RTT by default
for all samples. It has some implications like forwarding printk
to logger and that, as a default behavior, may not be welcomed.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The nRF91 DK User Guide clearly says "the LEDs are active high,
meaning that writing a logical one ('1') to the output pin will
illuminate the LED".
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable TIMER1 by default in nrf9160_pca10090 so it can be selected
by user for hardware byte counting in UARTE or other purpose.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Making a clean slate for some pylint CI tests. Only enabling relatively
uncontroversial stuff.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Following fix SRAM size to take into account CCM,
enable CCM and update yaml files in boards including fixed soc
dtsi definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
One of the bullet list items didn't get rendered properly because
continuation line wasn't indented.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
As em7d is configured with HARVARD, CCM will be used not DDR,
SRAM should point to DCCM.
This bug will cause the wrong caculation of heap area,
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
When using V0.10.0 SDK, flashing is not working anymore on
stm32f4_disco.
Using st_nucleo_f4.cfg instead of stm32f4discovery.cfg solves
the issue.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Kwon Tae-young