This commit completes the refactoring of radio.c, so it
calls abstract functions for PPI handling for LE Coded
PHY (e.g. enable, disable channels, or configure endpoints),
which, then, call the platform-specific functions for PPI
handling. The abstract functions are simple wrappers,
implemented in radio_nrf5_ppi.h, conditionally, if we
build the controller with support for LE Coded PHY.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Make the definitions of LE Coded PHY-specific macros
and inline functions conditional, i.e. only if we
actually build the controller with support for LE
Coded PHY.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit refactors radio.c, so it calls abstract functions
for PPI handling (e.g. enable, disable channels, or configure
endpoints), which, then, call the platform-specific functions
for PPI handling. The abstract functions are simple wrappers,
implemented in radio_nrf5_ppi.h.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit defines generic macros for the software interrupt
(SWI) IRQ lines that are used for LLL and ULL LOW interrupts.
This is done for both the cases of the legacy and new (split)
controller architectures. In addition, it abstracts some of
the functionality around software-IRQ signals, to generic
functions, which have platform-specific implementations.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Stores friend queue packets unencrypted, removing any out-of-order
issues caused by seqnum allocation. Also moves as much of the metadata
storage as possible into the packet, allowing us to free up some bytes
of net_buf user data for friend packets.
Fixes#18488
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Makes a define for the seqzero 13-bit mask in transport, and exposes it
in the header for use in the friend module.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
This reverts commit 0951ce2d34.
This change introduces regression on GPIO interrupts handling
when several GPIOs are configured.
Fixes#19177
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some confluence of recent changes resulted in builds with
application-specific bindings being unable to find bindings present in
the system directory. Add quotes and splits as necessary to propagate
multiple directories through the system.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Not sure why these were formatted the way they were, but I've removed
unnecessary line breaks, embedded control characters (actual embedded
tabs, not escape sequences) and escape sequences.
No functional change.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
We don't need to save the ABI caller-save registers here, because
we don't preempt threads from nested IRQ contexts.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The test needs to cram at least 8 messages into the log buffer, but
with 64-bit pointers only 5 fit, so make the buffer a bit bigger.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This is a naive implementation which does "eager" context switching
for floating-point context, which, of course, introduces performance
concerns. Other approaches have security concerns, SMP implications,
and impact the x86 arch and Zephyr project as a whole. Discussion is
needed, so punting with the straightforward solution for now.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Use the INT_TO_POINTER() and companion macros to silence compiler
warnings about casting between pointers and ints of different sizes.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The CMSIS layer doesn't like large stacks, and x86 in long mode
requires large stacks, so we disable these tests for now (as was
previously done on the x86_64 port for the same reasons).
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
In long mode, x86 does not support static IDTs or OpenOCD,
so disable the tests related to these features.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
These inline-assembly functions are identical between IA32 and
Intel64 arches, so move them to the common arch.h file.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add qemu_x86_long board (with CONFIG_X86_LONGMODE=y) for testing.
This requires adding support to soc/ia32 for long mode (trivial),
and adding a quick 64- to 32-bit ELF conversion before invoking
QEMU, which apparently doesn't like 64-bit kernel files.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This function, like its cousin z_tsc_read(), can be shared between
subarches. Note: it's unclear to me if we actually need these to be
two separate functions (do we need serialization?) or if they can
be combined into one function. Add that to the to-do list.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The previous linker script was barebones and non-standard. It is
replaced with a script conforms to the rest of the Zephyr arches,
utilizing include/linker headers and standard macros.
link-tool-gcc.h is updated to account for the "i386:x86-64" arch and
the generation of 64-bit ELF binaries.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Fleshed out z_arch_esf_t and added code to build this frame when
exceptions occur. Created a separate small stack for exceptions and
shifted the initialization code to use this instead of the IRQ stack.
Moved IRQ stack(s) to irq.c.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The IRQ_OFFLOAD_VECTOR config option is also moved to the arch level,
as it is shared between both 32- and 64-bit subarches.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Using the arch Kconfig here, instead of kernel/Kconfig. Intel64 with
the SysV ABI requires some pretty big stacks. These 4K-8K defaults
are arguably a bit small, but the Zephyr defaults are REALLY too small.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
First "complete" version of Intel64 support for x86. Compilation of
apps for supported boards (read: up_squared) with CONFIG_X86_LONGMODE=y
is now working. Booting, device drivers, interrupts, scheduling, etc.
appear to be functioning properly. Beware that this is ALHPA quality,
not ready for production use, but the port has advanced far enough that
it's time to start working through the test suite and samples, fleshing
out any missing features, and squashing bugs.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Simplified these two inline functions somewhat, and refactored them:
unlocking can be shared between subarches, but locking cannot.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Widen the integer to pointer size before conversion, to make
explicit the intent (and silence the compiler warning). Also
fix a minor bug involving a duplicate (and thus dead) store.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The sys_inXX() and sys_read/writeXX() I/O primitives can be shared
between subarches of x86 with minor modifications, so move them.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This patch adds basic build infrastructure, definitions, a linker
script, etc. to use the Zephyr and 0.10.1 SDK to build a 64-bit
ELF binary suitable for use with GRUB to minimally bootstrap an
Apollo Lake (e.g., UpSquared) board. The resulting binary can hardly
be called a Zephyr kernel as it is lacking most of the glue logic,
but it is a starting point to flesh those out in the x86 tree.
The "kernel" builds with a few harmless warnings, both with GCC from
the Zephyr SDK and with ICC (which is currently being worked on in
a separate branch). These warnings are either related to pointer size
differences (since this is an LP64 build) and/or dummy functions
that will be replaced with working versions shortly.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Use different headers for kernel_arch_{func,thread}.h when in
CONFIG_X86_LONGMODE, and add placeholders for Intel64 versions.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Some definitions may be shared between subarchitectures, so refactor
accordingly. The definitions are also modified to separate bits. A
placeholder is created for the Intel64 definitions.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Some of the elements of arch.h can be shared between subarches,
so put them in a common file and factor out the rest. Placeholder
left for the Intel64 definitions to be added later.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The IA32 and Intel64 subarchitectures will generate different offset
symbols, so they are refactored. No functional change.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The _irq_to_interrupt_vector[] array shouldn't be accessed directly,
as there is a macro for this.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Update the -march flag passed to the compiler to reflect the
underlying microarchitecture is 'goldmont'.
Fixes: #17104
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
We now more throroughly discuss memory domains, thread
resource pools, and automatic memory domains.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Commit db48d3e22a ("sys_sem: add build time definition macros")
recently introduced SYS_SEM_DEFINE() and defined it in terms of
Z_DECL_ALIGN() and __in_section() to force the _k_sem linker section.
It is however cleaner and less obscur to use Z_STRUCT_SECTION_ITERABLE()
and list the _sys_sem linker section alongside the _k_sem one.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The commit provides default SWO frequency value for efr32_slwstk6061a
board. The SWO frequency is limited by board hardware to 875 kHz.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Ioannis Glaropoulos