Add support in arm_cortex_m python script to read thread
registers off of a thread's stack when switching context.
When CONFIG_ARM_STORE_EXC_RETURN is enabled, check the exc_return value
in thread's arch struct to determine accurately where the stack pointer
is. Also, set r7 (the frame pointer register) in case the frame pointer
is not omitted.
Only 8 registers are read from the top of the stack
for other threads present in the dump. So update the
script to reflect that.
Signed-off-by: Mark Holden <mholden@meta.com>
Update zephyr gdb-server scripts to understand threads.
Parse the kernel_thread_info out of the elf file to be used
for finding offsets to data from _kernel structs or from
individual threads.
Update log_parser to understand latest format change, which
allows for the presence of a new section, threads metadata.
Update gdbstub to respond to various packets to describe
the threads present in a dump, and allow switching to
thread context of each thread.
Signed-off-by: Mark Holden <mholden@meta.com>
When working with coredumps, it is useful to be able to modify base
registers. Adding this capability allows implementing scripts to
inspect backtrace of threads other than current the current thread.
Signed-off-by: Félix Turgeon <felixturgeon@meta.com>
Add support to coredump_gdbserver.py for running in a pipeline,
communicating through stdin/stdout instead of a socket.
This allows starting it from inside gdb, with:
target remote | coredump_gdbserver.py --pipe <elf_file> <log_file>
Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
This adds support for using coredump with Xtensa DC233C core,
which are being used by qemu_xtensa and qemu_xtensa_mmu.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
* Add support for coredump on ARM64 architectures.
* Add the script used for post-processing coredump output.
Signed-off-by: Marcelo Ruaro <marcelo.ruaro@huawei.com>
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Signed-off-by: Roberto Medina <roberto.medina@huawei.com>
The current toolchain version for espressif SoCs does not
have the same limitation on registers indexing as the previous
one, enabling sending the correct A0-A15 register values directly
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Disables allowing the python argparse library from automatically
shortening command line arguments, this prevents issues whereby
a new command is added and code that wrongly uses the shortened
command of an existing argument which is the same as the new
command being added will silently change script behaviour.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Adds compatibility with Intel ADSP GDB from Zephyr SDK and
from Cadence toolchain to coredump_gdbserver.py.
Adds CAVS 15-25 (APL) register definitions. Implements
handle_register_single_read_packet to serve ADSP GDB
p packets.
Prevents BSA from changing between stack dump printout
and coredump by taking lock. Observed to be necessary for
accurate results on slower simulated platforms.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
Adjust get_mem_region to not return region when address == end
as there will be nothing to read there. Also, a subsequent region
may have that address as a start address and would be a more appropriate
selection.
Signed-off-by: Mark Holden <mholden@fb.com>
GDB server dummies WINDOWBASE to 0 and WINDOWSTART to 1
for both arches and sends An as corresponding ARn for ESP32
to get around packet size limitation. Fixes backtrace and
other issues causing GDB client to crash.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
The parser module name collides with builtin parser module in python.
This seems to break the import in windows.
Signed-off-by: Elliot Revell-Nash <elliot.revell-nash@wdtl.com>
This removes the z_ prefix those (functions, enums, etc.) that
are being used outside the coredump subsys. This aligns better
with the naming convention.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
get_mem_region() may return None for a non-existent memory region
so we need to check first before looking at its properties.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the necessary bits in arch code, and Python scripts
to enable coredump support for ARM Cortex-M.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a very primitive coredump mechanism under subsys/debug
where during fatal error, register and memory content can be
dumped to coredump backend. One such backend utilizing log
module for output is included. Once the coredump log is converted
to a binary file, it can be used with the ELF output file as
inputs to an overly simplified implementation of a GDB server.
This GDB server can be attached via the target remote command of
GDB and will be serving register and memory content. This allows
using GDB to examine stack and memory where the fatal error
occurred.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Mark Holden