Fix doxygen comment typos used to generate API docs
Change-Id: I248d53000d8e57b902b9a18fdcfc9e995142a8b3
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Added serial (UART) driver for Atmel SAM MCU family.
Note:
- Error handling is not implemented
- The driver works only in polling mode, interrupt mode is
not implemented.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Jira: ZEP-1959
Change-Id: I3e770fd1feb2ddf92cf405a9aa17be92eb32e19b
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Added I2C bus (TWIHS) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Jira: ZEP-1866
Change-Id: Ic5aa7b6b21295feccae883d580b38bbeaf2ce291
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
CONFIG_BOARD was set to arduino_101_ble instead of curie_ble. Fix this
so the BOARD_NAME, BOARD, board dir, all are in sync.
Change-Id: I5f2a4f1aeec7c20f042e11b96e1c87883ad4df4b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce SoC specific config options similar to what exists on NRF51,
this is mostly to help distinguish between SRAM & Flash sizes on
different variants.
Also deleted some unnecessary setting of CONFIG_SOC_NRF528{32,40} in the
board defconfig files.
Change-Id: I3aaedf0c15423ae12636f87b8e6a39070cbb2c6f
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds initial support and documentation for the kw40z on the hexiwear
board.
Jira: ZEP-1391
Change-Id: Idb58bfb3c2951b1f737a8c547860bde4ef4d9a3e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converted over all STM32F3 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F3.
Boards that are now using devicetree:
* Nucleo f334r8
* STM32373C Eval
Change-Id: I081a1d83f86e417a98b6864c745354b6b32953b7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F1 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F1. Also
renamed the STM32F10{3,7} SoC dtsi to try and make it clear that the 'X'
is a place holder. Fixedup the top level compatiables in the boards to
be the specific 'X' instead of the generic one.
Boards that are now using devicetree:
* Nucleo f103rb
* STM3210C Eval
* STM32 MINI A15
Change-Id: I29b3634ec7451f974687d55980414efa655e2e96
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F4 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F4.
Boards that are now using devicetree:
* 96b_carbon
* nucleo f401re
* nucleo f411re
Change-Id: Ibe197ca0a3f5ad78d594485a578d986403cc824a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since all the L4 SoCs are using DTS we can remove the various Kconfig
bits that we now get from DTS.
Change-Id: Icdec49b478ff285dc3347b09412964a721f75bbf
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
I2C_SHARED_IRQ, I2C_0_IRQ_SHARED, I2C_0_IRQ_DIRECT Kconfig options
are DW driver specific. Its presence is confusing for a user of any
other I2C driver than DW. This patch renames these options to include
DW string and makes it visible only for DW I2C driver. This is a
similar implementation to that used by ETH DW Ethernet driver.
Change-Id: I795506f9b103c028a22317df9ad632dce5cd1343
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default a factory new SAM E70 chip will boot SAM-BA boot loader located in
the ROM, not the flashed image. This is determined by the value of GPNVM1
(General-Purpose NVM bit 1). Updated flash procedure will ensure that GPNVM1
is set to 1 changing the default behavior to boot from Flash.
Change-Id: Ic6334c9d4743a7665fc944e8f49fc1467ecda40d
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add openocd.cfg to control flashing and debugging of the
olimexino-stm32 board
Change-Id: Ia40d964b737792864efd85076bc599b2de15ebb0
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The schematics of the BBC micro:bit are hard to find, and its official
web-site doesn't document the mapping of the edge connector pins
numbers the nRF51 GPIO pin numbers. Provide helpful defines for this
in the board.h file.
Change-Id: I52ce1d61558703b6aa5a5d073ccd222f27fa8760
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The core build in the SDK does not have a timer, making it impossible
to use this core with most of the sanity checks. We are working on
getting a special package of cores for Zephyr which meet our build
requirments; until then, remove this core as it doesn't build.
Change-Id: I3fa201f3c6b5724501e8cb1e1b8ba631436ebc23
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
* CONFIG_SOC is now properly set and we do not need a separate
XTENSA_CORE build variable
* Some unnecessary macro -D CFLAGS in the Xtensa Makefile removed
* There is no default SOC selection, it is now done explicitly in
the board's defconfig
* CONFIG_<board name> now renamed to CONFIG_SOC_<board name in
uppercase> to conform to established style.
Issue: ZEP-1711
Change-Id: I88997530db09970b7fdd1c3e3d355bfca9d0be1a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
update references to shell sample that was moved by
https://gerrit.zephyrproject.org/r/#/c/12442/
Change-Id: I61b527c9077b05b67fc9c43f2ecff50dc92dae9c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Adds fxas21002 and max30101 sensors to the list of supported features in
the hexiwear_k64 board document. Updates the pinmux table with the
sensor pins and sorts it by port name, then pin number.
Change-Id: I7d4c2c3b7b0e6e52b34e5675ce957c3bc5d18d46
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
These are fixed I/O registers for getting and setting the states of
LEDs, buttons, SPI chip-selects, and LCD control lines. It also contains
several free-running counters with no specific use.
Change-Id: Ib49306d5501574f7eb354165cdca6f29e3d4dad4
Signed-off-by: Jon Medhurst <tixy@linaro.org>
On stm32 family, IP instance numbering starts from 1.
Update i2c driver to this scheme to minimize user
confusion
Change-Id: I967d5975bbbad59cd8a3a7b6dfc665955d09cc9f
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
For the SoCs in which all the boards for that platform are using dts we
can remove the Kconfig bits that are now coming from device tree.
Change-Id: Iccf4c84beb83fa1c516b6166f94de37b4a0162ae
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Previously, cc3200_launchxl board was not able to show the
Zephyr Boot Banner, as that required early initialization
of the UART driver, which was done POST_KERNEL.
This patch moves the pinmux and UART driver initialization
to PRE_KERNEL_1, allowing early printk, and the Boot Banner
to show.
Change-Id: I84a7c20c1d5bdc3de150dc6bb0adebc9a2d9f5cb
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The LEDs on BBC micro:bit boards are red and not green. Since
mentioning the color doesn't really provide any value to the GPIO pin
definitions, just remove it.
Change-Id: I7f53e0d8a0733cda911a624d0b53c750eacfa685
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
OPENOCD_PRE_CMD, OPENOCD_POST_CMD variables require adding
'-c' in front of an actual OpenOCD command. This is in contrary
to other OPENOCD_*_CMD varialbles which specify OpenOCD commands
directly. This patch aligns usage of various OPENOCD_*_CMD variables.
It is no longer required to add '-c' in front of OPENOCD_PRE_CMD,
OPENOCD_POST_CMD variables.
Change-Id: I276fab00b099694c83c3bf74aa5dd59c8d6a308b
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now both flashing over DFU and JTAG are supported, however JTAG needs a
special connection, so DFU is the current out of the box supported
method for flashing.
Jira: ZEP-1785
Change-Id: I47ffce3b332b99ef6c6afdce2214709a4fa5b946
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch adds the necessary changes to enable use of DTS for
generating required build information.
Change-Id: I0d7aa15488339a425ffe57b6354992851212f7f3
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
At the moment CC2520 configuration options are selected inside "TI
CC2520 Driver RAW channe" submenu like:
[*] TI CC2520 Driver support ----
[ ] TI CC2520 Driver RAW channel --->
Make RAW channel depends on TI CC2520.
Change-Id: I92879b7f4391f1842c012b6c03c78956e90b9441
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Now that dfu-util is a supported flashing method, make it the
default flashing option for Carbon when used via 'make flash'.
Change-Id: I0d2fb9a8cbb4324ea77f1c94ca5df6f1a51e67f6
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
added the riscv-privilege SOC_FAMILY, under which all
riscv SOCs supporting the riscv privilege architecture
specifcation shall reside. These SOCs shall notably have
a common base for handling IRQs.
Moved riscv32-qemu under the riscv-privilege SOC_FAMILY
Change-Id: I5372cb38e3eaed78886f22b212ab4f881ef30b3f
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
Tested on nrf52_pca10040 and nrf51_pca10028 using hello_world sample.
Change-Id: I7cdf1d21e7f8232da737a06e5afbfb1eaec05cde
Signed-off-by: Michał Kruszewski <mkru1992@gmail.com>
This builds the zephyr OS image with the proper flash offsets for
slot 0.
After building, the image needs to be signed using the zep2newt.py
script included in the MCUBoot repo:
./scripts/zep2newt.py --vtoff 0x200 --word-size 4 --sig RSA \
--key root-rsa-2048.pem --bin <path to zephyr.bin> \
--out <path to zephyr.bin>
And then run 'make flash'.
Change-Id: I4739c0b7912c8066882208cb450a8224d433965b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
- Fix path to pinmux.c
- Fix note markup
- s/TTY-to-USB/TTL-to-USB/ ; s/adaptor/adapter/
- Recommend 3.3V TTL serial cable
- Consistent use of "Flyswatter2" official spelling
- s/UART0/UART1/
- Provide CONFIG_ARC_INIT relevant value
- s/for for/for/
- Consistent naming of JTAG 2x5 male pins as "micro JTAG header"
- s/orange/green/
- The Arduino 101 micro JTAG header connects to the Flyswatter2
via the ARM Micro JTAG Connector
- Consistent case
- $USERNAME is not set on Ubuntu, $LOGNAME is POSIX-compliant
- su requires root password, 'sudo su' only requires user password
- Exit root session when done creating udev rule
- Note: code-block above should be rewritten using 'sudo tee'
- s/X86/x86/
- Fix paths to i586-zephyr-elfiamcu-gdb and arc-zephyr-elf-gdb
- samples/hello_world does not set CONFIG_ARC_INIT=y, so suggest
using tests/booting/stub instead
- s/debugserver/debug server/
- s/BLUETOOTH_DEBUG_STDOUT/BLUETOOTH_DEBUG_LOG/
- s/bottle neck/bottleneck/
Change-Id: I4a76020f67d9672f59eae52f78c5caeb9e513aee
Signed-off-by: Patrice Buriez <patrice.buriez@intel.com>
Explain how to create the udev rules granting access to the
Arduino 101 board in DFU mode.
Explain the available methods to flash the Arduino 101 board:
either manually with dfu-util command line,
or automated with ZEPHYR_FLASH_OVER_DFU=y and 'make flash'.
Provide instructions for x86, ARC and BLE cores, using distinct
code-blocks for the manual and make-assisted methods.
Change-Id: I0f9fe3849dec3c2dc2249b77d31d4f2414c98331
Signed-off-by: Patrice Buriez <patrice.buriez@intel.com>
Let 'make flash' invoke the dfuutil.sh support script, and
export the relevant DFUUTIL_* environment variables, for all
3 cores of the Arduino 101 board: x86, ARC and BLE.
This is backward compatible with the current usage of OpenOCD
over JTAG, since this is only enabled when the environment
variable ZEPHYR_FLASH_OVER_DFU is set to y.
Change-Id: Ic5528cb87a180378d7120d150c27d1e24c9ebe75
Signed-off-by: Patrice Buriez <patrice.buriez@intel.com>
Basic Watchdog driver for Atmel SAM family MCUs. Currently only
disabling the watchdog is supported.
Tested on Atmel SAMV71 Xplained Ultra Evaluation Kit.
Origin: Original
Jira: ZEP-1684
Change-Id: I8f717c7f53aa290c944b7935e0570c2a6f53956e
Signed-off-by: Souvik K Chakravarty <souvik.k.chakravarty@intel.com>
Though the SPI_CS_GPIO Kconfig entry (in drivers/spi/Kconfig) has
"select GPIO" specified, we are observing that merely adding
the symbol(SPI_CS_GPIO) in the
defconfig (boards/x86/arduino_101/Kconfig.defconfig)
is triggering unmet direct dependency warnings
(though the build goes through).
Since the defconfig entry(SPI_CS_GPIO) is not selecting
the aforementioned 'select' rule, we add it manually here.
Jira: ZEP-1668
Change-Id: Ida6a0c851462d747e6559bd0c78fa52e1d0f24b5
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
With the default of 192, the x86 rom will span from
0x40010000 - 0x4004000. However the default starting
ROM address for the ARC side is configured to be
0x40034000. If the x86 image is large enough it will
clobber the ARC code. Shorten the x86 side such that
its last flash address is 0x40033FFF.
Change-Id: I23987c3db11f0e51c2405b8baee114aee39de571
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
David B. Kinder