Commit Graph

10 Commits

Author SHA1 Message Date
Kumar Gala e9a1d6493d dts: arm: nxp: imx: Use 'nxp,imx-{i,d}tcm' compatible
On i.mx6/7 the TCMU and TCML regions are specific to instruction or
data.  So use the nxp,imx-itcm for TCML and nxp,imx-dtcm for TCMU.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-12-19 08:14:33 -06:00
Diego Sueiro 6d070c77b6 drivers/ipm: Add IPM support for i.MX7
This patch ads the support for the IPM drivers on i.MX7 SoC family.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-11-21 04:03:59 -06:00
Kumar Gala c0faa8a9f4 dts: Update i.MX PWM device tree binding/nodes for #pwm-cells
Add #pwm-cells to the i.MX PWM binding and dts files.  This is to
support have a pwms clients work properly.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-10 10:46:04 -06:00
Kumar Gala 0eb0e78d67 dts: Fix warnings associated with reg/unit-address not matching
Newer DTC now warns about mismatch between the reg and unit-address.
Most of these cases are due to case not matching, so fix thoses so
everything is lowercase.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-10 09:11:58 -05:00
Diego Sueiro 9283ee7acc arch: i.MX add RDC peripheral permission setting for applications cores
This patch adds the RDC (Resource Domain Controller) peripheral
permissions settings for the i.MX applications cores (Cortex A9 on
i.MX6 and Cortex A7 on i.MX7).

This will enable both Linux (on application's core) and Zephyr (on M4
core) to share the peripherals and coexist.

The settings are defined at devicetree level and applied in the soc.c.

A complete solution should involve the SEMA4 to control the peripherals
access and prevent resource deadlocking and misusage.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-09 10:17:32 -05:00
Diego Sueiro d99f6ada84 arch: Add support for i.MX PWM
Adds definitions, devicetree entries and clock controller
configurations for PWM peripheral.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-07-17 16:08:22 -05:00
Diego Sueiro 970c4f9cf3 arch: Add imx7d_m4 i2c definitions
Adds all necessary i2c definitions and configurations for imx7d_m4 soc.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-07-06 15:55:57 -05:00
Diego Sueiro e8e76ae433 arch: Add imx7d_m4 gpio definitions
Adds all necessary gpio definitions and configurations for imx7d_m4 soc.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-05-08 06:56:56 -05:00
Yannis Damigos 398a5a4fc2 dts: dtc v1.4.6 warnings: Fix warning for leading 0s
Fixes the following warnings:
Node unit name should not have leading 0s

Fixes #7155

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-04-26 03:00:42 +05:30
Diego Sueiro 816330239e arch: Add imx7d m4 soc support
The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual
Cortex A7 core and Single Cortex M4 core.

Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A7 core (running Linux) via RPmsg.

The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README

The A7 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A7 can perform these steps at bootloader level after the Linux
system has booted.

The M4 can use up to 5 different RAMs. These are the memory mapping for
A7 and M4:

+---------------+-----------------+---------------------------+
| Memory Name   | Start Address   | Size                      |
+===============+=================+===========================+
| TCML          | 0x007F8000      | 32KB                      |
+---------------+-----------------+---------------------------+
| TCMU          | 0x20000000      | 32KB                      |
+---------------+-----------------+---------------------------+
| OCRAM_S       | 0x20180000      | 32KB                      |
+---------------+-----------------+---------------------------+
| OCRAM         | 0x00900000      | 128KB                     |
+---------------+-----------------+---------------------------+
| DDR           | 0x10000000      | 256MB                     |
+---------------+-----------------+---------------------------+

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-04-11 08:27:05 +02:00