On i.mx6/7 the TCMU and TCML regions are specific to instruction or
data. So use the nxp,imx-itcm for TCML and nxp,imx-dtcm for TCMU.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add #pwm-cells to the i.MX PWM binding and dts files. This is to
support have a pwms clients work properly.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Newer DTC now warns about mismatch between the reg and unit-address.
Most of these cases are due to case not matching, so fix thoses so
everything is lowercase.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds the RDC (Resource Domain Controller) peripheral
permissions settings for the i.MX applications cores (Cortex A9 on
i.MX6 and Cortex A7 on i.MX7).
This will enable both Linux (on application's core) and Zephyr (on M4
core) to share the peripherals and coexist.
The settings are defined at devicetree level and applied in the soc.c.
A complete solution should involve the SEMA4 to control the peripherals
access and prevent resource deadlocking and misusage.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual
Cortex A7 core and Single Cortex M4 core.
Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A7 core (running Linux) via RPmsg.
The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README
The A7 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A7 can perform these steps at bootloader level after the Linux
system has booted.
The M4 can use up to 5 different RAMs. These are the memory mapping for
A7 and M4:
+---------------+-----------------+---------------------------+
| Memory Name | Start Address | Size |
+===============+=================+===========================+
| TCML | 0x007F8000 | 32KB |
+---------------+-----------------+---------------------------+
| TCMU | 0x20000000 | 32KB |
+---------------+-----------------+---------------------------+
| OCRAM_S | 0x20180000 | 32KB |
+---------------+-----------------+---------------------------+
| OCRAM | 0x00900000 | 128KB |
+---------------+-----------------+---------------------------+
| DDR | 0x10000000 | 256MB |
+---------------+-----------------+---------------------------+
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>