The Holyiot YJ-16019 board is a small, coin cell driven board based on
the Nordic Semiconductors nRF52832. It provides one LED and one push
button.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The approved trademark name is Wi-Fi so update references to WiFi and
other spellings to Wi-Fi in documentation and Kconfig help strings.
(Note that use of spelling variatios of "wifi" in module names, CONFIG
names, link names and such are untouched.)
https://www.wi-fi.org/
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Moves the flash memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the sram memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new argument to the openocd runner to optionally specify the
config file. Updates the rv32m1_vega board to use different openocd
config files for the ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Introduces a new rv32m1_vega board configuration for the zero-riscy
core. It assumes that the soc has been reconfigured with openocd to boot
to the zero-riscy core instead of the ri5cy core.
Refactors the board-level device tree so the ri5cy and zero-riscy
configurations share common definitions for the led, button, and sensor
nodes.
Tested with:
- samples/hello_world
- samples/synchronization
- samples/basic/blinky
- samples/basic/button
- samples/sensor/fxos8700
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The stm32_min_dev board blue/black variant support USB device,
but the usb node removed by merge PR #15245, so add it back.
Signed-off-by: Harry Jiang <explora26@gmail.com>
The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The TI CC1352R LaunchPad (LAUNCHXL-CC1352R1) is a development kit that
features the CC1352R SoC.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
The TI CC26x2R LaunchPad (LAUNCHXL-CC26X2R1) is a development kit that
features the CC2652R SoC.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
The '#if XIP' in the DTS file never worked properly,
causing the QEMU build to think it has much more RAM
then it actually has. If RAM overflowed, this would not
be caught by the build, instead there would be strange
crashes when the data copy takes place.
The QEMU targets themselves are not XIP, everything
is actually RAM, but the first 4 megabytes are
considered to be a memory-mapped flash region. This
is done to ensure that the XIP data copying infrastructure
doesn't bit-rot on x86. We are at the point where
a lot of things depend on this, so just select it in
the board Kconfig instead of enabling in the
defconfigs.
Fixes: #15835
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fix "arduino_i2c not found" issue, similar to #13708
Add arduino interfaces in dts to board nrf52_10040
Signed-off-by: Aaron Tsui <aaron.tsui@outlook.com>
Enables BT_CTLR if BT is enabled, connects shell-uart to uart0,
and enabled NRFX uart driver by default.
Signed-off-by: Tavish Naruka <tavishnaruka@gmail.com>
Implementation of pinmux for the stm32mp157c_dk2 board.
Some UART pin mux definition has been added (mainly for
UART console and UART/SPI Arduino shield support).
This can be completed with pin mux for other stm32mp157c
UART.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Move SERCOM peripherals to use the raw defines generated from DTS
parsing. This adds aliases to the DTS so that the SERCOM number
can still be used for clocking and pinmux.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
The 96Boards Argonkey mezzanine board has been officially
published on ST website:
https://www.st.com/en/evaluation-tools/steval-mki187v1.html
Update documentation with official picture and website info.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The mimxrt1015_evk board image was corrupted and did not display
properly in the board documentation. Fix it.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This was tested with the hello world application. UART 0 was used
as console for displaying "Hello World! mec15xxevb_assy6853" to
the serial terminal.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
soc : arm : microchip_mec Use rename fault clear function
The Cortex-M core function to clear faults was rename by
upstream. Update to use new name.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
When importing a pre compiled imported library it is currently
required to perform three steps.
This commit introduces a helper function which allows the
user to import a library with a single function call.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
This board and the native_posix board share the POSIX architecture.
Some of the native_posix drivers/backends only rely on the
underlaying operating system API, and do not require any special
HW model to operate.
Therefore it is quite easy to reuse some of them into this board.
Currently the only limitation for some, is the interface they use
in the board to register their command line arguments.
This header provides a minimal shim to rename the, otherwise
equivalent, call.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
A new function pcie_irq_enable() is added to be used in lieu of
irq_enable() when the target device is PCI(e)-attached. The function
attempts to use MSI, when configured in the kernel and supported by
the endpoint; failing that, it will verify that IRQ requested is in
fact routed to the device by the boot firmware before enabling it.
The NS16550 UART driver is updated to use pcie_irq_enable().
The PCI(e) shell is extended to dump information about wired IRQs.
The up_squared devicetree is fixed (reverted?) to IRQ5 for UART1.
The galileo enables MSI by default.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The Atmel SAMD21 (and therefore also the SAMR21) comes with the same
RTC peripheral as the Atmel SAMD20.
Enable it in dts_fixup.h and enable it in the dts for samr21_xpro.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Add the Atmel SAM R21 Xplained Pro Evaluation Kit to zephyr.
So far, UART, SPI, I2C (depends on #14128), debug LED and user button
have been tested.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Since STM32_OSPEEDR_VERY_HIGH_SPEED flag is required for all I2S_CK
pins, lets add this to the STM32F4 pinmux header and remove the
duplicates in board files. While we are at it, let's add the missing
pinmux definitions for I2S_2 also.
Fixes: #9028
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Replace image and reword some sections to indicate the presence of two
board variants: stm32_min_dev_(blue|black)
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
Add support for blue pill and black pill variants of the STM32
minimum development board by splitting board configuration into
stm32_min_dev_blue and stm32_min_dev_black.
CODEOWNERS: Add myself (@cbsiddharth) as codeowner for stm32_min_dev
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
We shall not enable by default a system timer in ARM
platforms, namely the SysTick, the Nordic, or the SAM0
RTC timer, simply by assessing the hardware capabilities
(e.g. by conditioning on CPU_CORTEX_M_HAS_SYSTICK).
Instead, now, all ARM platforms needs to explicitly set
their system timer module. Note that this has already
been the case for ca 80% of the ARM platforms.
This clean-up allows us to decouple HW capabilities from
system configuration (for example, Nordic platforms may
enable option CPU_CORTEX_M_HAS_SYSTICK, and still use
the platform-specific RTC timer for system timing).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Reduced flash size for QEMU x86 so it does not consume a lot of RAM
memory where it is simulated.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
This commit adds a flash driver implementation that writes to RAM and
exports statistics through stats.h. It can be used to simulate flash
memory for testing purposes.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Henrik Brix Andersen