Commit Graph

5 Commits

Author SHA1 Message Date
Goh Shun Jing d5e0fdafa1 dts: nios2: intel: nios2-qemu: add jtag interrupt
assign interrupt number 0 for jtag_uart.
Number can be found in soc/nios2/nios2-qemu/include/system.h
JTAG_UART_0_IRQ 0

Signed-off-by: Goh Shun Jing <shun.jing.goh@intel.com>
2023-01-27 14:24:43 -05:00
Kumar Gala 8d2cbc639c flash: nios2_qspi: Add dts binding and nodes for NIOS2 QSPI flash
Add dts bindings for the NIOS2 QSPI controller and flash device and
add nodes to the dts files for these devices as well.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 08:11:42 -04:00
Kumar Gala 30ca967c0e dts: nios2: Remove label property from devicetrees
Label properties are not required.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-23 09:27:32 -05:00
Gerard Marull-Paretas 4c8a8149de dts: add reg-shift property to all ns16550 devices
The ns16550 flags reg-shift property as optional. In case it is not
supplied, the ns16550 driver relies on a value defined in <soc.h>, or,
by default it takes 4 (shift by 2).

This patch adds the property to all ns16550 nodes, with the following
values:

- 2 if SoC did not have any custom value defined by
  UART_REG_ADDR_INTERVAL (corresponds to 1 << 2 = 4)
- If SoC defined DEFAULT_REG_INTERVAL (snps_arc_iot/it8xxx2), use such
  value (4=2, 2=1, 1=0).

These changes will allow simplifying the ns16550 driver.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-15 16:59:02 -05:00
Maureen Helm f987095a51 dts: nios2: intel: Move SoC devicetree includes under a vendor directory
Cleans up SoC devicetree include file locations to follow the convention
of dts/<arch>/<vendor>/

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-05-09 17:54:48 -04:00