Device Tree address mixup between
SAI2 <-> SPI2 and SAI3 <-> SPI3
Add functionality to SPI2/3
Tested on SPI2
Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
Switch the interrupt controller address to lower case to avoid this
warning:
stm32f723e_disco.dts.pre.tmp:97.39-102.5: Warning (simple_bus_reg):
/soc/interrupt-controller@40013C00: simple-bus unit address format
error, expected "40013c00"
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
add dts bingings for dma usage
add dts support for adc with edma and hwtrigger
add a periodic_trigger feature to dts
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Add SCIF bus initial support to Renesas R-Car SOC series.
SCIF1 is used as main serial and shell output on R-Car H3 board.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Commit 233149eec5 moved flash sram nodes
under /soc for various nordic ICs, but the indentation isn't right for
52811. Fix it.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
For dmamux nodes the dma-requests property specifies the number of
peripheral request inputs(not nr. of request trigger inputs).
This commit fixes this for g4 series.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
reg value should match value provided within node name (as in pll@2).
Fix this to avoid warning.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As the KW2XD is a SiP (System-in-package) the SPI1 controller on the MCU
is connected to the modem. As the pinctrl details for this in the
SoC dtsi file as these pins are not exposed in the pindata XMLs from
NXP.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Set SPI0 controller to default to being disabled in SoC dtsi files and
having the board dtsi files enable it. The only board that wasn't doing
this already was the frdm_kw41z.dts.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add clocks node and clocks to stm32l5 series.
PLL binding is reused from stm32l4 series.
Matching binding is updated to document that.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add clocks nodes for F0/F3/G0/G4 series.
For F0 and G0 series, update compatible for rcc node
to specify use of dedicated "st,stm32f0-rcc" compatible.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove default pll settings to ensure pll users are correctly
configuring all prescalers on purpose and avoid surprises.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds flash clock settings in device tree for stm32h7
series such that the stm32h7 flash driver can get the clock settings
from this dtsi file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The current serial driver uses hard code configuration. Rework driver
to use pinctrl and enable full configuration from device tree.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Provided nodes reflect the clock tree of each series.
Clock nodes are disabled by default but populated with default
start up configuration. Main reason is the we don't want to
impact boards using Kconfig based clock configuration for now.
Exception to these rules:
- syslck: Default enabled, clock frequency and clock source not
provided
- pll: clock source not provided
This is made on purpose so that errors are triggered if parameters
essential to the board configuration are not provided.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
i2s1 is not present in all stm32f4 series. So moving the i2s1 node
from the top level stm32f4 dtsi file to the stm32fxx specific dtsi
files. Also in stm32f429zi, the sequence starts from i2s2, this commit
helps in having the right channel number.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
STM32G0 is supported by the st,stm32-dma-v2 driver.
This commit adds dma1 and dmamux dts bindings
for stm32g03x, stm32g05x and stm32g07x.
For stm32g0bx additionally dma2 is added.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This patch adds flash clock settings in device tree for stm32wb
series so that the stm32 flash driver can get the clock settings
from this dtsi file.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
This patch adds flash clock settings in device tree for stm32l4
series so that the stm32 flash driver can get the clock settings
from this dtsi file.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
This patch adds flash clock settings in device tree for stm32l1
series so that the stm32 flash driver can get the clock settings
from this dtsi file.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
This patch adds flash clock settings in device tree for stm32g4
series so that the stm32 flash driver can get the clock settings
from this dtsi file.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
This patch adds flash clock settings in device tree for stm32g0
series so that the stm32 flash driver can get the clock settings
from this dtsi file.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Enabling pwm on timer3 for stm32l1 series in dtsi.
Adding other timer nodes for pwm capability.
Signed-off-by: Sidhdharth Yadav <sidhdharth.yadav@hcl.com>
Renesas RCar Gen3 series have up to 8 GPIOs
bank.
Add bank 5 and bank 6, that is used to manage user led and
switches on different demo board.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
The Compare match timer can be found on Renesas
RCar Gen3 soc series.
It depends on clock controller to supply clock to the
CMT module.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Rico Ganahl