Commit Graph

14 Commits

Author SHA1 Message Date
Jim Shu 81b0bdfa99 board: riscv: add qemu_riscv32_xip board to test XIP mode
Add a variant riscv build target that only is run for tests tagged
with "xip".

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-04-16 12:26:10 +02:00
Anas Nashif ff24090527 tests: filter default platforms
Do not attempt to build/run all tests. Emulation platforms should
primarily build kernel and architecture related tests.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-19 14:41:01 -05:00
Martin Åberg 8a2d5aa716 boards: qemu_riscv32 use virt machine
Upgrade board specification to use the VirtIO board.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2021-01-15 13:06:33 -05:00
Martin Åberg d2e9568543 riscv: make COMPRESSED_ISA independent of FLOAT_HARD
The CONFIG_FLOAT_HARD config previously enabled the C (compressed)
ISA extensions (CONFIG_COMPRESSED_ISA). This commit removes that
dependency.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2021-01-15 13:06:33 -05:00
Andrew Boie a9670ab5cf boards: centralize QEMU icount management
Instead of endlessly repeating the same command line args,
centralize this and tune the shift value on a per-board
basis.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-24 20:28:36 -04:00
Wentong Wu 589a0c22ff boards: qemu_riscv32: enable icount mode
Enable icount mode for qemu_riscv32 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-05-14 13:52:07 +02:00
Corey Wharton d873573f76 tests: fp_sharing: Enable build-only tests for RISC-V QEMU platform
Enables build-only tests for the qemu_riscv32 platform.

Signed-off-by: Corey Wharton <coreyw7@fb.com>
2020-04-22 16:39:48 -07:00
Ulf Magnusson c5839f834b kconfig: Remove assignments to CONFIG_<arch> syms and hide them
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.

CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.

Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:

1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
   turn the CONFIG_<arch> symbols into invisible
   (promptless/nonconfigurable) symbols instead.

   Getting rid of the choice allows the symbols to be 'select'ed (choice
   symbols don't support 'select').

2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
   This makes sense since you know the architecture if you know the SoC.

   Put the select on the SOC_* symbol instead for boards that don't have
   a SOC_SERIES_*.

3. Remove all assignments to CONFIG_<arch> symbols. The assignments
   would generate errors now, since the symbols are promptless.

The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.

See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.

This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-08 00:50:08 -06:00
Kumar Gala 1dc4b1dd2f boards: shrink image sizes
Reduce images sizes of boards.  Get a roughly 3x reduction in size.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-07 13:52:45 -05:00
Peter A. Bigot f83ad78261 dts: jedec,spi-nor: require size property
The SPI NOR driver requires that the size (in bits) be provided in the
devicetree node.  Update the binding to make the property required,
and update all nodes based on the memory chip identified.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-11-09 15:26:06 +01:00
Ulf Magnusson 975de21858 kconfig: Global whitespace/consistency cleanup
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).

Go for the most common style:

 - Indent properties with a single tab, including for choices.

   Properties on choices work exactly the same syntactically as
   properties on symbols, so not sure how the no-indentation thing
   happened.

 - Indent help texts with a tab followed by two spaces

 - Put a space between 'config' and the symbol name, not a tab. This
   also helps when grepping for definitions.

 - Do '# A comment' instead of '#A comment'

I tweaked Kconfiglib a bit to find most of the stuff.

Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 15:53:23 +01:00
David B. Kinder 60136f00cb doc: add how to exit from QEMU in samples
While trying out the hello_world sample built for QEMU, I was expecting
the sample app to exit and I'd return to a command prompt.  Nope.  You
need to exit QEMU manually, so add that step to the sample instructions.
Looking around, there are more uses of QEMU like this that could use
this added step after running the sample app.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-09-02 12:06:08 -04:00
Nicolas Pitre 75bf3c5368 riscv: freedom: rename RISCV32 to RISCV
This code is common to 32- and 64-bit builds.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-08 00:29:24 -04:00
Nicolas Pitre 1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00