Commit Graph

183 Commits

Author SHA1 Message Date
Yannis Damigos 96740a0570 boards: stm32l4: Clean up driver generic flags
Clean up driver generic flags from boards' _defconfig files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Yannis Damigos d60dc69ee7 boards: stm32f4: Clean up driver generic flags
Clean up driver generic flags from boards' _defconfig files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Yannis Damigos a6f8283ecd arch: st_stm32: Add common series configuration file
Add common series configuration file

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Carles Cufi 7d764b35f3 cmake: Use path-corrected version of ZEPHYR_BASE
Instead of accessing the environment variable ZEPHYR_BASE every time we
require accessing the source code root, use an intermediate variable
that has OS path separators correctly set to '/' to avoid issues on
Windows.

Note: This removes the ZEPHYR_SOURCE_DIR CMake variable. External
applications using that will need to change to use the new ZEPHYR_BASE
variable.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-11 14:59:03 -05:00
Ilya Tagunov 935d0ce89b soc: arm: stm32: fix startup SystemCoreClock values
Current STM32 SoC initialization code sets really weird startup values
to SystemCoreClock. It should be consistent with Reference Manuals after
this change.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-01-08 08:38:17 -07:00
Jan Van Winkel 30b65d8986 arm: stm32l4: include RNG ll header
Include low level random generator header in case stm32 random number
generator should be used by entropy driver

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2018-01-04 09:18:21 -05:00
Neil Armstrong 7e2fd68b1f arm: stm32f0: include I2C ll header
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Sudarsana Nagineni aca079c9fc boards: olimex stm32-e407, stm32f407g_disc1: Enable USB OTG Support
Enable USB OTG support for olimex stm32-e407 and stm32f407g_disc1
boards by adding USB OTG to the pinmux table. Also, fix out of
range endpoint addresses in CDC ACM case for STM32F4 based boards.

Signed-off-by: Sudarsana Nagineni <sudarsana.nagineni@intel.com>
2017-12-12 12:36:08 -06:00
Neil Armstrong 22b4d19a6d ARM: stm32f030x8: fix FLASH_PAGE_SIZE
Fix to the correct flash page size for the stm32f030x8 SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Neil Armstrong 071cff7fb5 ARM: stm32f0: switch flash registers to volatile
Like other STM SoCs (L4 and F0), switch the flash registers struct
to volatile.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Neil Armstrong 494e1734e0 ARM: stm32f0: fix syscfg mapping to fix EXTI config
The exticrX registers were shifted by a word, so configuring
an EXTI line on a port different of PA misconfigured the EXTI line
source and could flood with unwanted events.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-07 08:08:41 -06:00
Anas Nashif 1f1143ac87 build: use kconfig to select generated artifacts
Not all boards require the various binary formats zephyr generates. So
be selective based on the arch, SoC or board and only geenrate the
binaries actually needed.

Fixes #5009

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-11-23 07:29:13 -05:00
Sebastian Bøe 0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe 12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Bobby Noelte 3849b36f09 arch: arm: soc: provide support for stm32f091
Support the ST STM32F091xC SoC.

Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
2017-11-06 11:39:16 -06:00
Leandro Pereira da9b0ddf5b drivers: Rename `random` to `entropy`
This should clear up some of the confusion with random number
generators and drivers that obtain entropy from the hardware.  Also,
many hardware number generators have limited bandwidth, so it's natural
for their output to be only used for seeding a random number generator.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Leandro Pereira adce1d1888 subsys: Add random subsystem
Some "random" drivers are not drivers at all: they just implement the
function `sys_rand32_get()`.  Move those to a random subsystem in
preparation for a reorganization.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Bobby Noelte 2f7688bfd3 arch: arm: core: fix vector table relocate write to flash
Some SOCs (e.g. STM32F0) can map the flash to address 0 and
the flash base address at the same time. Prevent writing to
duplicate flash address which stops the SOC.

Allow Cortex M SOCs to create their own vector table relocation
function.

Provide a relocation function for STM32F0x SOCs.

Fixes #3923

Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-10-23 12:31:47 +02:00
Maciej Debski db8fd88fab arch: arm: soc: provide support for stm32f0.
Fixes #3923

Signed-off-by: Maciej Debski <maciej.debski@rndity.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-10-23 12:31:47 +02:00
Adam Podogrocki 61467e019e iwdg: the sample of the use of STM32 Independent Watchdog
JIRA: ZEP-2347

Change-Id: I808e9f110681735cae45d14c5802636012f018cc
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-10-23 09:51:16 +02:00
Adam Podogrocki 6d4da19602 iwdg: make independent watchdog driver compliant with STM32Cube LL API
Appropriate inclusion done for F1/F3/F4/L4 families in SoC tree.

JIRA: ZEP-2347

Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-10-23 09:51:16 +02:00
Kumar Gala 46555f17e9 i2c: stm32f3: Cleanup how we enable the specific I2C driver
Match change we made to how I2C is enabled for other stm32 platforms:

Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it.  When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled.  While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-22 22:05:37 -05:00
Erwan Gouriou da210ba0ba driver: serial: Move STM32 UART driver to LL API
STM32 UART driver was using a mix of LL/HAL APIs.  This commit removes
calls to HAL API and replaces them with LL APIs.  No functional change
have been seen during non regression testing.

But we could note a direct gain of 1Kb of ROM

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-10-20 12:28:11 -05:00
Yannis Damigos a172f72d84 boards: stm32f3_disco: Add I2C support
Add I2C support to STM32F3DISCOVERY board

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-20 12:28:11 -05:00
Pushpal Sidhu d5cf7e0912 arch: stm32f4: Add CONFIG_GPIO_STM32_PORTD=y
Default enable PD for all stm32f4 series

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2017-10-17 08:56:15 -05:00
Loic Poulain 8a11f91252 usb: Add support for STM32 family USB driver
This is a USB controller driver for STM32F4xx devices using
the STM32 Cube HAL_PCD framework. This has been tested with
the cdc_acm driver on a 96b_carbon board (STM32F401RE).

This is a refactoring of:
usb: usb_dc_stm: Add support for STM32Cube HAL_PCD USB driver
Signed-off-by: Christer Weinigel <christer@weinigel.se>
[daniel.thompson@linaro.org: Removed STM32F40(157) defconfig changes
together with STM32F4Discovery pinmux and defconfig changes, updated
clock settings and pad configuration to match latest mainline]
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[giannis.damigos@gmail.com: Change uint*_t types to u*_t types,
change SYS_LOG_USB_DC_STM_LEVEL to SYS_LOG_USB_DRIVER_LEVEL and
update pinmux to match latest arm branch]
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2017-10-17 09:14:47 -04:00
Yannis Damigos 1f0c6118d2 arch: stm32f4: Select USB_DC_STM32 driver if USB is enabled
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-17 09:14:47 -04:00
Marti Bolivar c38efa668c arm: soc: stm32l4: add flash driver for IMG_MANAGER
Add definition required to enable the DFU subsystem image manager.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-10-06 22:12:23 -04:00
Marti Bolivar 92e29680c1 arm: soc: stm32f4: add flash driver for IMG_MANAGER
Add definition required to enable the DFU subsystem image manager.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-10-06 22:12:23 -04:00
David B. Kinder f00f58517b doc: replace UTF-8 chars
Some our Zephyr tools don't like seeing UTF-8 characters, as reported in
issue #4131) so a quick scan and replace for UTF-8 characters in .rst,
.h, and Kconfig files using "file --mime-encoding" (excluding the /ext
folders) finds these files to tweak.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-10-03 20:03:57 -04:00
Erwan Gouriou 1ded7d7b33 arch: arm: stm32: factorize stm32f417xy socs defconfig files
stm32f417xe and stm32f417xg have been introduced with 2
different defconfig files. Since same code is declared
in both files, mutualize declarations in a single file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-09-12 11:24:56 -04:00
Yannis Damigos 0f408a003c arch: soc: st_stm32: Remove unused enumeration from F4, F3 SoCs
The enumerations stm32{f3,f4}x_pin_config_mode aren't used any
more. This patch removes them.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-09-12 11:24:56 -04:00
Marti Bolivar 32482e9cb8 flash: stm32: stm32f4: add page layout support
Add flash page layout support for STM32F4 SoCs.

This almost eliminates the need for flash_map.h, except for
STM32F4X_SECTOR_MASK, so delete the file and move the define into the
F4 implementation, to keep things simple.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-09-11 11:41:57 -04:00
Kumar Gala e25ee68bbd arch: arm: stm32f1: Fix how we determine pull-up/pull-down for gpio
When we mask out the GPIO High impedance/Pull-up/Pull-down field we
should be shifting the mask file, not shifting the field.  This is
because all the other defines already assume the shift.

Coverity-CID: 173640

Jira: ZEP-2538

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-08-21 11:18:03 -05:00
Erwin Rol 8e6ebdb090 arm: support for stm32f417 SOC
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-08-09 14:53:47 -05:00
Erwin Rol 57746488d4 arm: support for stm32f405 SOC
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-08-09 14:24:21 -05:00
Yannis Damigos 0848843c04 arch: arm: stm32f1: Add missing input port configuration
This patch adds missing configuration bits when GPIO is
configured as input

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-08-09 10:11:51 -05:00
Yannis Damigos a66b92459b arch: arm: stm32f1: Shift GPIO pin configuration values only once
In the stm32_gpio_flags_to_conf function the configuration
values of the GPIO pin are shifted two times. One in the
stm32-pinctrlf1 header and one in the function. This patch
removes one of those shifts.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-08-09 10:11:51 -05:00
Erwin Rol cf7765327b arch: arm: stm32: f3/f4/l4: write output speed to hardware register
The ouput speed of the gpio pins passed via the 'conf' argument was
ignored, causing the speed to always be in its reset state (lowest
possible speed for most pins). This was causing problems for pins that
actually need a speed faster than the default, like the ethernet
controller pins.

Combined with the correct pinmux configuration this fixes problems
of the olimex_stm32_e407 board not being able to send ethernet data.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-08-02 12:28:11 -05:00
Erwan Gouriou 72d2960741 arch: arm: stm32f3: Rework pinmux handler
STM32F3 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed as information is transfered to
"pinconf" array

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-26 15:16:52 -05:00
Erwan Gouriou 8763939763 arch: arm: stm32f4: Rework pinmux handler
STM32F4 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed as information is transfered to
"pinconf" array

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-26 15:16:52 -05:00
Erwan Gouriou 8d0150000c arch: stm32f1: rework pinmux driver
Rework stm32f1 pinmux code for future dts based pinmux code
generation.
Pin configuration is now done directly thanks to gpio port
configuration. Reference to pseudo alternate functions are
now removed same as the use of pins[] array.
Pins function (uart tx for instance) is set implicitly by
defining gpio mode and configuration.
This behavior is specific to stm32f10x series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-26 15:16:52 -05:00
Erwan Gouriou 2366d23573 arch: arm: stm32l4: Rework pinmux driver
STM32L4 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed and information is transferred to
"pinconf" array

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-26 15:16:52 -05:00
Erwan Gouriou 92c7ef5939 arch: stm32: l4: factorize HAS_STM32CUBE
In L4 series, select HAS_STM32CUBE is done per soc.
This could be factorized in Kconfig.series.
Aim is  to lower the steps to add a new SoC.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-26 09:52:59 -05:00
Erwan Gouriou 46d66163eb arch: arm: stm32l4: Add pin config for USART1 on PB6/PB7
With introduction of commit "pinmux: stm32: directly return error if
stm32_get_pin_config fails", pin configuration fails when
pins are not configured in pins[] array.
This was the case for configuration UART1 assigned on PB6/PB7.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-20 07:30:32 -05:00
Erwin Rol be88626695 pinmux: stm32: add ethernet controller pins
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-12 12:53:51 +03:00
Erwin Rol 2fc9dc61d4 drivers: stm32: random: Initial STM32 random number generator driver
Add a STM32 LL based driver for the RNG processor. The RNG processor
is a random number generator, based on a continuous analog noise, that
provides a random 32-bit value to the host when read. The RNG passed
the FIPS PUB 140-2 (2001 October 10) tests with a success ratio of 99%.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-07 07:27:39 -05:00
Kumar Gala 8e8d49a620 i2c: stm32: Cleanup how we enable the specific I2C driver
Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it.  When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled.  While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-05 11:33:08 -05:00
Jorge Ramirez-Ortiz dd2eeaf352 pinmux: stm32f4: Add SPI2 pins on PB12, PB13, PB14 & PB15
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00
Jorge Ramirez-Ortiz 3ebb412fa9 pinmux: stm32f4: Add SPI1 pins on PA4, PA5, PA6 & PA7
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00