Commit Graph

26821 Commits

Author SHA1 Message Date
Marc Herbert aa4ed2ae8c host-gcc: TOOLCHAIN_LIBS += libgcc (copied from compiler/gcc/)
Add missing -lgcc when compiling with ZEPHYR_TOOLCHAIN_VARIANT=host
merely copying some existing code from
'compiler/{clang,gcc}/target.cmake'.

This fixes compilation for the following boards with an x86
microprocessor:

 galileo, minnowboard, qemu_x86, qemu_x86_nommu, up_squared,
 up_squared_sbl

Compilation of the following boards with an X86_IAMCU microcontroller
still fail with a "cannot find -lgcc" error:

 arduino_101, qemu_x86_iamcu, quark_d2000_crb, quark_se_c1000_devboard,
 tinytile

This is _not_ a regression because these boards _already_ failed with
"undefined reference to __udivdi3" and other libgcc symbols.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-01-26 12:06:04 -05:00
Marc Herbert 5ac9cfd131 host-gcc: add missing set(CMAKE_ASM_FLAGS -m32)
This fixes the following error on all x86 BOARDs (qemu_x86,
galileo,... see "make usage" for the complete list) when compiling
assembly files with ZEPHYR_TOOLCHAIN_VARIANT=host:

 cc1: error: CPU you selected does not support x86-64 instruction set

This also fixes the following error when compiling minnowboard,
up_squared and up_squared_sbl boards with ZEPHYR_TOOLCHAIN_VARIANT=host:

  cc1: error: -mpreferred-stack-boundary=2 is not between 3 and 12

This fix alone is not enough to compile any of these boards; however it
moves compilation much further to the next, unrelated failure(s),
namely: 'undefined __udivdi3' and other libgcc symbols for all x86
boards; + some other, additional issues for some boards. See next
commit.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-01-26 12:06:04 -05:00
Anas Nashif 1ee7b0dc5a linker: x86: add orphan linker sections
Add missing linker section to avoid warning about orphans when building
with host compiler.

Fixes #12719

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-01-26 09:21:17 -05:00
Alberto Escolar Piedras f7b0398e7e nrf52_bsim: Fix copy pasted comment
A comment which had been copied straight from the native_posix
board refered to the nrf52_bsim board as native_posix,
which it is not, and may confuse users.
Fix it.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-01-26 08:46:53 -05:00
Kumar Gala 0d744c9a08 cmake: dtc: silence output from check_dtc_flag
We'd get output from a cmake build that would have lines like:

Version: DTC 1.4.7
Version: DTC 1.4.7

This was a side effect of check_dtc_flag.  Add the OUTPUT_QUIET option
to execute_process to supress this output.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-25 23:14:54 -05:00
Marek Pieta a304528f51 debug: SystemView fix
Change fixes problem with mutexes and initialization for SystemView,
adds config options to:
- choose if SystemView should start logging events on system start
- select SystemView RTT buffer size

Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
2019-01-25 17:37:51 -05:00
Georgij Cernysiov bed7fb3df0 drivers: modem: modem receiver dependencies adaptation
Moved UART interrupt dependencies from concrete driver to
the modem receiver as it uses UART interrupt functions within.
This allows developing other UART interrupt based modems without
the need to depend on the aforementioned features explicitly.

Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
2019-01-25 17:36:59 -05:00
Daniel Leung 259b418b98 gen_isr_tables: fix typo for 3rd level INTR config symbol
The script looks for CONFIG_3RD_LEVEL_INTR_xx_OFFSET while
the config is actually CONFIG_3RD_LVL_INTR_xx_OFFSET.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-01-25 17:36:18 -05:00
Johan Hedberg f18e978837 Bluetooth: Take advantage of atomic_set_bit_to() API
Use the atomic_set_bit_to() API to simplify code where possible.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-01-25 17:35:44 -05:00
Johan Hedberg e405fc41f2 atomic: Add atomic_set_bit_to() API
Several places in the code have constructions like this:

	if (bool_variable) {
		atomic_set_bit(flags, FLAG);
	} else {
		atomic_clear_bit(flags, FLAG);
	}

To reduce the amount of code for such situations, introduce a new
atomic_set_bit_to() helper which lets you condense the above five
lines to a single one:

	atomic_set_bit_to(flags, FLAG, bool_variable);

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-01-25 17:35:44 -05:00
Aurelien Jarno 41f86c3db2 nvs: fix warnings in logger
When compiling NVS with NEWLIB_LIBC=y, GCC outputs the following
warning:

In file included from $ZEPHYR/include/logging/log.h:11:0,
                 from $ZEPHYR/subsys/fs/nvs/nvs.c:17:
$ZEPHYR/subsys/fs/nvs/nvs.c: In function 'nvs_init':
$ZEPHYR/subsys/fs/nvs/nvs.c:748:10: warning: format '%lx' expects
argument of type 'long unsigned int', but argument 3 has type 'u32_t
{aka unsigned int}' [-Wformat=]
  LOG_INF("alloc wra: %d, %" PRIx32 "",
          ^
fs->ate_wra and fs->data_wra are both defined as u32_t, so they need to
be printed with '%d'.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2019-01-25 22:26:58 +01:00
Emanuele Di Santo 3110937556 samples: bluetooth: hci_uart: add configuration for nrf52840_pca10090
Add a project configuration for nrf52840_pca10090 that will
route the nRF9160 interface pins to the nRF52840, and use them
for HCI over UART.

Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
2019-01-25 22:26:17 +01:00
Emanuele Di Santo e521ee651f boards: arm: add nrf52840_pca10090
Add support for nrf52840_pca10090, i.e. the nRF52840 SoC on the
pca10090 development kit. The SoC is tasked to route some of the
nRF9160 pins to different components on the development kit.
Additionally, it can be used as a Bluetooth HCI device.

The routing options appear under "Board config" in Kconfig.

Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
2019-01-25 22:26:17 +01:00
Ioannis Glaropoulos 2a3852fc75 soc: nrf: add include of nrfx_config_nrf9160.h in nrf9160 soc.h
In soc.h of nRF9160 SoC we need to explicitly include
nrfx_config_nrf9160.h to have the standard peripheral
base address macro mappings in Zephyr builds for nRF9160
SoC. (We need to do this spefically for nRF9160, as those
macros are not present in the nRF9160 MDK header).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-01-25 22:16:49 +01:00
Ioannis Glaropoulos 94f8f4c09d CODEOWNERS: Code-owner for nRF9160 Board
Assigning code-owner for Nordic Semiconductor nRF9160_pca10090
development board, featuring nRF9160 and ARMv8-M core with
ARM TrustZone-M.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-01-25 22:16:49 +01:00
Ioannis Glaropoulos cad94f0f77 boards: nrf: add initial documentation for nrf9160_pca10090
This commit adds the initial documentation information
for board nrf9160_pca10090.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-01-25 22:16:49 +01:00
Ioannis Glaropoulos 7d5ab373cc boards: arm: nrf: board definition for nrf9160_pca10090 (non-secure)
This commit contributes the Kconfig and DTS board definition
files for nrf9160_pca10090ns board. This Zephyr board shall be
used to build Non-Secure Zephyr applications on nrf9160_pca10090
Dev Kit.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-01-25 22:16:49 +01:00
Ioannis Glaropoulos c3d7bb1511 boards: arm: nrf: board definition for nrf9160_pca10090
This commit contributes the Kconfig and DTS files for the
nrf9160_pca10090 board definition. The nrf9160_pca10090 board
shall be used to build Zephyr applications, running in Secure
mode, on nRF9160_PCA10090 Dev Kit.

Additionally, the commit introduces a default Secure and
Non-Secure flash partition configuration for the
nRF9160_PCA10090 board, allowing to use Zephyr for building
both the Secure and Non-Secure firmware images.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-01-25 22:16:49 +01:00
Marti Bolivar 312ed45345 boards: riscv32: add rv32m1_vega
This board directory supports the RV32M1 Vega board when targeting
a RISC-V CPU core on the main SoC.

Currently, only RI5CY support is provided via the rv32m1_vega_ri5cy
board name.

Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
2019-01-25 11:59:46 -05:00
Michael Scott 13c794bc1c serial: RV32M1: introduce lpuart driver / DT bindings
Add a UART driver.

Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Michael Scott 0f314ebdda gpio: RV32M1: introduce gpio driver / DT bindings
Add a GPIO driver.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-01-25 11:59:46 -05:00
Michael Scott cdb1714c6c pinmux: RV32M1: introduce pinmux driver / DT bindings
Add a pinmux driver.

Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Marti Bolivar 58d8afb476 interrupt_controller: RV32M1: add intmux driver / DT bindings
Add a level 2 interrupt controller for the RV32M1 SoC. This uses the
INTMUX peripheral.

As a first customer, convert the timer driver over to using this,
adding nodes for the LPTMR peripherals. This lets users select the
timer instance they want to use, and what intmux channel they want to
route its interrupt to, using DT overlays.

Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Mike Scott <mike@foundries.io>
2019-01-25 11:59:46 -05:00
Michael Scott 521f4778a1 clock_control: RV32M1: introduce PCC driver / DT bindings
Add a Peripheral Clock Controller (PCC) driver. This gates and ungates
clocks to various peripherals on the SoC.

Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Marti Bolivar 502d306630 soc: riscv32: add RV32M1 SoC as openisa_rv32m1
The OpenISA RV32M1 SoC has four CPU cores. Two of these are RISC-V
32-bit cores, which are named "RI5CY" and "ZERO-RISCY". (The other two
cores are ARM Cortex-M0+ and -M4.) This patch adds basic SoC
enablement for the RISC-V cores:

- basic dtsi, to be extended as additional drivers are added
- SoC definition in soc/riscv32/openisa_rv32m1 for RI5CY / ZERO-RISCY
- system timer driver for RI5CY, based on LPTMR0 peripheral

The timer driver will be generalized a bit soon once proper
multi-level interrupt support is available.

Emphasis is on supporting the RI5CY core as the more capable of the
two; the ZERO-RISCY SoC definitions are a good starting point, but
additional work setting up a dtsi and initial drivers is needed to
support that core.

Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
2019-01-25 11:59:46 -05:00
Marti Bolivar 1f96f55183 ext: hal: add openisa/vega_sdk_riscv
This provides a HAL for the OpenISA RV32M1 SoC.

Origin: open-isa-rv32m1 GitHub organization
URL: https://github.com/open-isa-rv32m1/rv32m1_sdk_riscv
Revision: 365b1060f0947d5250c07b3eebdbc9e54cd0246e
Maintained-by: External
License: BSD-3-Clause

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Marti Bolivar 449170548b arch: riscv32: support CONFIG_WDOG_INIT
Borrow from an Arm Cortex-M convention where each Kconfig.soc can
define a 'config WDOG_INIT' that does watchdog initialization early in
the boot process if that SoC needs it.

Some SoCs have watchdogs that are enabled by default and need to be
turned off during reset handling (to be re-enabled if necessary by a
Zephyr watchdog driver).

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Marti Bolivar ef765b28cb arch: riscv32: follow-on tweaks
A couple of follow-on patches suggested after previous RISCV32 arch
changes were merged.

Tweak some help in arch/riscv32/kconfig to better work with the RST
docs.

Take out all the CONFIG_PRINTK ifdeffery in fatal.c. The cause_str()
routine should get compiled out if PRINTK=n anyway.

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Marti Bolivar 0aa87e15bb drivers: interrupt_controller: multi-level improvements
Some extensions to the multi-level interrupt controller are required
to support SoCs with more than four level 2 interrupt "aggregators".

Extend existing support to allow at most 8 level 2 or level 3
aggregators. Use Kconfig macro templates to cut down on boilerplate.
Try to clarify some aspects of the Kconfig help while we're at it, and
change the type of options which count things or are table offsets
from "hex" to "int", so that the generated .config is easier to read.

Finally, make some improvements to gen_isr_tables.py while we are
here. In particular, move some assignments around to cut down on
duplicated work, don't check for symbols we know must exist, and
improve the debug logging output's readability.

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Marti Bolivar 4d36c23060 cmake: gcc.cmake: allow users to influence CMAKE_REQUIRED_FLAGS
A GCC-based toolchain may require additional, toolchain-specific
values in CMAKE_REQUIRED_FLAGS to perform compiler checks properly,
but gcc.cmake clobbers any values the user provides.

Preserve them instead, allowing users to give their own compiler
checking flags at generation time.

The details for the particular issue that inspired this are described
in https://github.com/pulp-platform/pulpino/issues/240.

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Tomasz Bursztyka ea5d01b41c drivers/gpio: Act relevantly if GPIO_INT is an unsupported flag
Using right error code, and no need to populate callback related API
functions.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-01-25 11:24:29 -05:00
Tomasz Bursztyka 04d9d57a63 api/gpio: Controller may not support GPIO_INT at all
It's not an error if a driver does not implement callback related
function. Let's return -ENOTSUP relevantly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-01-25 11:24:29 -05:00
Tomasz Bursztyka 064f5f0cef drivers/gpio: Manage callback addition/removal properly
It needs to verify if the callback was not already installed, and if so:
if is was in controller's list.
It should return an error in case the node is not found though it was
requested to be removed.
If already inserted, it will be silently removed but added again, to
avoid circular list as stated in the bug.

Fixes #11394

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-01-25 11:24:29 -05:00
Jukka Rissanen 4043909d69 net: http: Remove HTTP client and server APIs
The old legacy APIs use net-app library and as that is being
removed, then the dependencies need to be removed also.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-01-25 11:21:20 -05:00
Jukka Rissanen 1cba0161ed net: websocket: Remove the websocket as HTTP APIs are removed
Remove the experimental websocket code as it uses HTTP APIs
which are being removed.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-01-25 11:21:20 -05:00
Cinly Ooi a691e5e751 tests: lib: mem_alloc: esp32 to skip newlib test
esp32 has no support for newlib

Signed-off-by: Cinly Ooi <cinly.ooi@intel.com>
2019-01-25 11:20:42 -05:00
Benoit Leforestier 68b1890ead C++ : Fix error: template with C linkage
If we include this headers files in cpp source code,
the compiler say"error: template with C linkage".

Includes must be moved outside the 'extern "C"' section.

Signed-off-by: Benoit Leforestier <benoit.leforestier@sekurity.fr>
2019-01-25 11:19:56 -05:00
Kumar Gala 61cb8b6c4f drivers: wdog: cmsdk: Convert to new DT_<COMPAT>_<INSTANCE> defines
Convert cmsdk driver to use new defines so we can remove the
dts_fixup.h code for it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-25 08:55:06 -06:00
Kumar Gala 4b6cec44ff drivers: uart: cmsdk_apb: Convert to new DT_<COMPAT>_<INSTANCE> defines
Convert cmsdk_apb driver to use new defines so we can remove the
dts_fixup.h code for it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-25 08:55:06 -06:00
Kumar Gala da474efe80 drivers: i2c: i2c_sbcon: Convert to new DT_<COMPAT>_<INSTANCE> defines
Convert i2c_sbcon driver to use new defines so we can remove the
dts_fixup.h code for it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-25 08:55:06 -06:00
Anas Nashif 1878765972 sanitycheck: adapt default boards
- nucleo_l496zg was added by mistake

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-01-25 07:30:01 -06:00
Johann Fischer 5c23843e65 bluetooth: smp: fix build if BT_SMP_SELFTEST is enabled
Build fails in smp.c:3942 if BT_SMP_SELFTEST is enabled,
sign_test uses smp_sign_buf which only available for BT_SIGNING.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-01-25 13:47:24 +02:00
Vinayak Kariappa Chettimada 1d470307b9 Bluetooth: tests : Include building the LL split in CI
Include building the init tests with the new Link Layer
split architecture.

Has the data length update and controller privacy disabled
until they are implemented in the new architecture.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2019-01-25 11:19:39 +02:00
Sebastian Bøe 04857d0d59 cmake: Rebuild when DTS sources are modified
Ensure that changes to DeviceTree sources cause CMake to be re-run
when make/ninja is invoked.

Note that this is not perfect, as it does not cover files that are
\#included, but it will cover most DT changes.

This fixes #12692

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2019-01-25 03:02:58 -06:00
Sebastian Bøe 361daf8ebd DeviceTree: Fix generated header comment
The header comment in 'generated_dts_board_unfixed.h' was including
'compatible' as a helpful text.

But something has been broken with how we extract 'compatible' because
it was being evaluated to 'q'. Giving a confusing header text:

Generated include file q

Since the mechanism is broken, and does not appear to be important, we
remove it.

Also, modernize how we generate multi-line strings.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2019-01-25 03:02:33 -06:00
Sebastian Bøe c23cc26c73 DeviceTree: Convert 'generated_dts_board.h' into a source file
extract_dts_includes.py has been generating DT output and then
concatenating it with fixup header files to create
'generated_dts_board.h'.

In this patch we instead introduce a source file named
'generated_dts_board.h' and have it \#include the appropriate DT
output and fixup files.

This results in a simpler system because users can now read
'generated_dts_board.h' as C source code to see how fixup files and
generated DT output relate to each other. Whereas before they would
have to either read documentation or python code to gain the same
understanding.

Also, it reduces the scope and complexity of one of our most bloated
python scripts, extract_dts_includes.py.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2019-01-25 03:02:33 -06:00
Paul Sokolovsky 858684a72c tests: socket: select: Add actual tests for select()
Ported from earlier poll() test.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-01-25 10:35:39 +02:00
Paul Sokolovsky fe7043d7ca samples: net: sockets: Set explicit min_flash on some samples
Fixes build issues with lpcxpresso54114_m0 which set to have 32K RAM,
and only 64K Flash.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-01-25 10:35:39 +02:00
Paul Sokolovsky 9ff4d47a8f tests: socket: poll: Add test for poll()
Basic test for poll() behavior. UDP sockets are used for simplicity
so far (poll-related paths for UDP and TCP are similar, though later
adding TCP explicitly for full coverage may be useful).

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-01-25 10:35:39 +02:00
Paul Sokolovsky 8c50ce934b samples: net: socket: Add "socket" tag to sample.yaml's
So it was easy to run all socket tests without remembering
the exact path(s).

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-01-25 10:35:39 +02:00