Commit Graph

5 Commits

Author SHA1 Message Date
Ulf Magnusson bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Wayne Ren 5bb1f4f230 boards: emsk: add initial support of normal/non-secure application
* Non-secure/normal application: em_starterkit_em7d_normal
* secure application: em_starterkit_em7d

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Kumar Gala 5f09eae7a1 kconfig: Hide the DesignWare SPI driver on unsupported platforms
When users are configuring applications they are given the option
to enable the DesignWare SPI driver. But they should not be given this
option on SoCs that don't have the DesignWare SPI HW.

This commit hides the driver by default by introducing the config
option HAS_SPI_DW.

Fixes: #10825

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-20 15:50:42 -05:00
Sebastian Bøe b9c125f64c kconfig: Hide the DesignWare I2C driver on unsupported platforms
When users are configuring nRF applications they are given the option
to enable the DesignWare I2C driver. But they should not be given this
option because nRF SoCs do not have DesignWare I2C HW.

This commit hides the driver by default by introducing the config
option HAS_I2C_DW.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-10-25 07:32:05 +01:00
Anas Nashif f183444682 arc: move soc to top-level dir soc/
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00