Add top level CMakeLists.txt entry and Kconfig options along with
userspace handlers for comparator API.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Introduce core support for ARM's SCMI (System Control and
Management Interface). This includes:
* shared memory (SHMEM) driver. This consists of a suite
of functions used to interact with the shared memory area.
* shared memory and doorbell-based transport layer driver.
Data is passed between platform and agent via shared
memory. Signaling is done using polling (PRE_KERNEL) and
doorbells (POST_KERNEL). This makes use of Zephyr MBOX API
(for signaling purposes) and the SHMEM driver (for polling
and data transfer).
* core driver - acts as glue between transport and protocol
layers. Provides synchronized access to transport layer
channels and channel assignment/initialization.
* infrastructure for creating SCMI protocols
This is based on ARM's SCMI Platform Design Document: DEN0056E.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Introduces a haptics API for use with LRA driver ICs to
create haptic feedback events.
Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
Implementation of the generic API Trusted Execution Environment driver.
This implements all basic syscalls, needed by tee driver, basic
defines and helpers to work with shared memory.
Signed-off-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com>
The MSPI(multi-bit SPI) is provided as a generic API to accommodate
advanced SPI peripherals and devices that typically require command,
address and data phases, and multiple signal lines during these phases.
While the API supports advanced features such as XIP eXecute In Place
and scrambling, it is also compatible with generic SPI.
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
Add Serial Wire Debug Port interface driver API and bit-bang driver.
The driver requires a simple Hardware Interface Circuits (HICs),
where signals CLK, DOUT, DIN, ENn, OE_ENn, RESETn
are connected to board GPIOs and buffered signals SWD_CLK and SWD_DIO
to the target.
Signal OE_ENn controls the direction of the Serial Wire (SWD_DIO),
ENn the buffers SWD_CLK possibly others and enables/disables HIC.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Introduce MIPI DBI driver class. MIPI DBI devices encompass several
interface types. All interfaces have a data/command, reset, chip select,
and tearing effect signal
Beyond this, MIPI DBI operates in 3 modes:
Mode A- 16/8 data pins, one clock pin, one read/write pin. Similar to
Motorola type 6800 bus
Mode B- 16/8 data pins, one read/write pin. Similar to Intel 8080 bus
Mode C- 1 data output pin, 1 data input pin, one clock pin.
Implementable using SPI peripheral, or MIPI-DBI specific controller.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Sort the Kconfig and CMakeLists include blocks again, and mark the start
and end of the blocks so that the CI can keep them sorted.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit adds the public header for the GNSS API, along
with the initial GNSS Kconfig file and an entry in the
common linker file for registered GNSS data callbacks.
A very naive implementation of the GNSS data callback is
provided as well in drivers/gnss/gnss_publish.c
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
The intention of hardware spinlock is to allow two processors,
that have no alternative mechanism for accomplish synchronization
and mutual exclusion operations, to share resources (such as
memory and/or any other element).
Here, we add the hwspinlock framework, that makes possible to use
those hwspinlock devices and stay platform-independent. Each
platform wishing to support hardware spinlock must describe a
driver using this framework.
Signed-off-by: Aziz Idomar <aidomar@sequans.com>
Add ACPI support for Zephyr using acpica open source
project. ACPI subsystem use to discover and configure
hardware components, perform power management (e.g. putting
unused hardware components to sleep), auto configuration (e.g.
Plug and Play and hot swapping) etc.
Signed-off-by: Najumon Ba <najumon.ba@intel.com>
Introduce the skeleton for multi-function device drivers. This driver
class is inspired by the same class found in Linux. Multi-function
devices expose multiple functionalities, for example, a LED driver,
regulator, GPIO controller, etc. The MFD driver class serves as a kind
of "parent" device where common functionality can be managed: bus
access, IRQ sharing, initialization code, etc.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add driver for communicating with EL3/EL2 layer using smc/hvc call
for Silicon vendor Provided services for INTEL AGILEX SOC FPGA.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Update the RTC driver menuconfig title to match the unified format
introduced in c41dd36de2.
Move the RTC driver menuconfig entry so the menuconfig list is still
(mostly) alphabetically sorted.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the Segger RTT module Kconfig to modules/segger/kconfig. The Segger
debug library is not a driver and should not reside under drivers/debug.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds the rtc.h header file which contains
API functions for real-time-clocks, which are low power
devices which track and represent broken-down time.
It also changes one line of doxygen documentation in the
maxim_ds3132.h file to place it in its own group.
The handlers for use of the API from userspace is also
added with this commit.
The API is split into one mandatory section, setting and
getting time, and three optional sections, alarms, update
event callback, and clock calibration.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Adds a new driver interface for retained memory devices which
can be used to store data and have it retained whilst the device is
powered thorugh different application execution states (though this
data may be lost in low power states).
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Port the gpio_keys_zephyr driver from the gpio subsystem with a
dedicated API to the input subsystem reporting input events.
Move the test as well, simplify the cases a bit since the API is simpler
now.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The Host Commands can be used with different transport layers e.g. SHI
or eSPI. The code that provides the peripheral API and allows sending
and receiving Host Commands via different transport layers is not
actually drivers of a peripheral, so move it to the
subsys/mgmt/ec_host_cmd folder.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
There are just list of child files to include, right now there's a hint
of that trying to be alphabetical but then entries have been added with
various logic, so one has to figure where stuff has to be added.
Rewrite these to:
- keep the list alphabetical, for CMakeLists unconditional first,
conditional after so one just has to select and sort
- drop the spaces in the Kconfig
- use a single space between target and directory
- rename from "Sub Systems" to "Subsystems" (single word)
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a sample sbs gauge driver with feature parity and basic tests
comparison to its sensor counter-part. Includes a simple stub test that is
extended upon.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit introduces a new api for the Dallas 1-wire protocol.
The api includes link functions for read and write operations on
bit, byte, and block level, as well as functions to reset and
lock the bus.
The bus configuration is derived from the device tree and can be
queried using w1_slave_count routine.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces driver for granting access for own grant
table and for mapping/unmapping foreign gref. Grant tables are used
for data exchange between Xen domains via shared memory page(s) (e.g.
for sharing ring buffer with driver data) This functionality is
widely used and needed for implementing PV backend/frontend drivers.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Add a pseudo device diver with device tree bindings for coredump.
The device tree bindings exposes memory address/size values to be
included in any dump. And the driver exposes an API to add/remove
dump memory regions at runtime.
Signed-off-by: Mark Holden <mholden@fb.com>
Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds a USB Type-C Port Controller Driver for
the STM32 USB Type-C / USB Power Delivery (UCPD) peripheral
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Initial implementation of a simple GPIO controlled power domain.
It exposes no API of its own, all functionality is contained inside
the runtime power management callbacks.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This adds skeleton Kconfig/CMakeLists.txt and common implementation
of some sys_mm_drv_*() functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.
If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.
This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This adds new FPGA controller which allow to control FPGA chips.
FPGA controller has been created to enable bitstream loading
into the reprogrammable logic. It adds completely new API,
which enables to check status of the FPGA chip, power it on
or off and reset it.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The cache API currently shipped in Zephyr is assuming that the cache
controller is always on-core thus managed at the arch level. This is not
always the case because many SoCs rely on external cache controllers as
a peripheral external to the core (for example PL310 cache controller
and the L2Cxxx family). In some cases you also want a single driver to
control a whole set of cache controllers.
Rework the cache code introducing support for external cache
controllers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The files disk_access_usdhc.c, disk_access_spi_sdhc.c,
disk_access_stm32_sdmmc.c, disk_access_ram.c and
disk_access_flash.c are actually drivers for block devices and SD/MMC
controllers. This patch moves this drivers to drivers/disk and
reworks the configuration so that the drivers are selected when
the corresponding node is enabled.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This patch includes initial support for FT800 display driver.
It includes basic features. It can be easily extended with more
FT800 display list and co-processor features.
Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
AArch64 has support for PSCI. This is especially useful for SMP because
PSCI is used to power on the secordary cores.
When the PSCI driver was introduced in Zephyr it was designed to rely on
a very PSCI-centric subsystem / interface.
There are two kinds of problems with this choice:
1. PSCI is only defined for the non-secure world and it is designed to
boot CPU cores into non-secure state (that means that PSCI is only
supposed to work if Zephyr is running in non-secure state)
2. There can be other ways or standards used to start / stop a core
different from PSCI
This patch is trying to fix the original wrong assumption by making the
interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI
only as an actual driver that is a user of this new interface /
subsystem.
For now the new subsystem is only exposing two methods: cpu_on and
cpu_off, others will probably follow according to the needs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Bjarki Arge Andreasen