Commit Graph

56 Commits

Author SHA1 Message Date
Daniel Leung adb9f0e02e xtensa: intel_s1000: turn on XTENSA_ASM2
Turns on XTENSA_ASM2 by default for intel_s1000.

Fixes #11034

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-28 14:53:52 -08:00
Daniel Leung 4c77c91f83 soc: intel_s1000_crb: fix GPIO IRQ in dts_fixup.h
The IRQ defined in DTS has already been shifted so there is
no need to shift again in dts_fixup.h.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 20:18:13 -06:00
Daniel Leung f8cafdeb8e soc: intel_s1000: make zephyr_prebuilt.elf a lot smaller
Due to fake IDT_BASE address, zephyr_prebuilt.elf is about 1.1GB
in size due to all the empty space between end of SRAM and IDT_BASE.
So move the IDT_BASE to the empty space just after SRAM. The section
will be discarded in the final zephyr.elf so it should not be a big
issue. After this change, zephyr_prebuilt.elf is now a bit smaller
than 5MB.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 20:17:47 -06:00
Daniel Leung 603f068690 uart/ns16550: Use DT_ prefix for remaining device configs
Previous rename from CONFIG_* to DT_* left a few remaining
CONFIG_*. So rename them manually now.

Fix #13753

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 20:06:26 -06:00
Sathish Kuttan 1b064787ef soc: intel_s1000: remove wrappers for cache ops
Remove function wrappers for cache operations
Replaced by SOC level macros.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-20 07:33:11 -05:00
Sathish Kuttan 9ab20620d8 soc: intel_s1000: macros for data cache operations
Add SOC level macros to flush and invalidate data cache.
Individual drivers can use this macro instead of defining
their own macros.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-20 07:33:11 -05:00
Daniel Leung 1e7025c2e7 boards: intel_s1000_crb: fix setting cache attributes
This reverts commit c9ace83c89 which
bypasses setting cache attributes.

The previous cache attributes actually set the text/data/etc.
sections to be inaccessible. So fix it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-15 16:21:50 -05:00
Sathish Kuttan 66d0898a21 soc: intel_s1000: add audio master clock config
Added a SOC level routine to configure master clock outputs
if CONFIG_AUDIO is defined.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-11 21:34:08 -05:00
Kumar Gala 4c51684918 drivers: i2c: dw: Convert to new DT_<COMPAT>_<INSTANCE> defines
Convert designware i2c driver to use new defines so we can remove the
dts_fixup.h code for it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-08 22:50:07 -05:00
Sathish Kuttan 04e72b7dae soc: intel_s1000: Encoded IRQ definitions for I2S
Use IRQ encoding macro to define the IRQ identifiers for I2S

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-04 00:52:15 -05:00
Sathish Kuttan 22c217b7ba soc: intel_s1000: Macro to encode multi-level IRQ
Add Macro to encode multi-level aggregation of interrupts
into an encoded IRQ value

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-04 00:52:15 -05:00
Daniel Leung 659c892b29 soc/intel_s1000: update DTS fixup due to CONFIG_SRAM_* changes
Commit ce7ed18989 moved CONFIG_SRAM_*
so dts_fixup.h needs to be updated for properly generated linker
script.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-01 19:14:29 -05:00
Savinay Dharmappa 40e0f18e21 dts: qemu_xtensa/xt-sim: Enable device tree support
patch enables dts support for boards qemu_xtensa and xt-sim

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-02-01 07:49:28 -06:00
Kumar Gala d3623a2fba soc: xtensa: intel_s1000: Encode IRQ in dts
Move IRQ number encoding out of dts_fixup.h and into the dtsi files.
For now just change devices on the dw_intc.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-01 04:09:01 -06:00
Savinay Dharmappa 3bec750268 dts: xtensa: esp32: Add device tree support.
add device tree support for esp32

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-01-29 09:47:17 -06:00
Rajavardhan Gundi e584b05215 dts: intel_s1000: Exclude sram space dedicated for mcubootloader
The starting 192kB SRAM is reserved for the mcubootloader. Exclude
this region while building an application to be loaded by mcubootloader.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2019-01-16 21:22:56 -05:00
Rajavardhan Gundi b5dd8ac37c Kconfig: intel_s1000: Move FIFO_DEPTH to soc Kconfig
FIFO_DEPTH should be in the SoC's Kconfig as this is a
configuration of SPI master controller in SoC.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2019-01-16 21:22:56 -05:00
Sathish Kuttan 39570b5bae soc: intel_s1000: Add SoC routine for GNA power-up
Add an SoC level routine to turn power and clock on for
Intel GNA block in Intel S1000 SoC.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-01-14 08:43:51 -05:00
Sathish Kuttan c3da9238f1 soc: intel_s1000: add DMIC power control
Add DMIC power on to SoC init sequence

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-01-07 16:50:49 -05:00
Rajavardhan Gundi 4df8ba3fe0 linker: intel_s1000: Remove limits on code and data sections
All text, data and bss sections are all mapped to the same physical
memory (SRAM). This patch removes the individual section limits
and defines a common limit for the sum of text, data and bss sections.
This would make it more flexible for application developers.

Fixes #11268.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-12-10 22:05:06 -05:00
Rajavardhan Gundi 022990f73d xtensa: Implement CONFIG_TEXT_SECTION_OFFSET
CONFIG_TEXT_SECTION_OFFSET allows the entire image to be moved
in memory to allow space for some type of header. The mcubootloader
can boot only such images which reserve some space for the header.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-12-05 15:48:49 +01:00
Patrik Flykt 8325a395ea soc: Add 'U' to unsigned variable assignments
Add 'U' to a value when assigning it to an unsigned variable.
MISRA-C rule 7.2

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2018-12-04 22:51:56 -05:00
Sathish Kuttan 1b656beb84 soc: intel_s1000: remove pinmux configuration
Since pinmux configuration is board dependent and is now under
boards/xtensa/intel_s1000, the configuration in soc.c is removed.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-29 14:23:24 -08:00
Sathish Kuttan 55002ad4d6 soc: intel_s1000: add I/O mux definitions
Added I/O mux selection definitions in order to use with a pinmux driver

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-29 14:23:24 -08:00
Sathish Kuttan 1b1c80256f dts: intel_s1000: add pinctrl to device tree
Add pinctrl node to Intel S1000 SoC device tree for I/O MUX selection

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-29 14:23:24 -08:00
Sathish Kuttan 23f11933b9 dts: intel_s1000: enable DTS for GPIO
Added GPIO to SoC device tree
Updated SoC DTS fixup
Removed Kconfig variables now replaced by DT

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-26 06:56:48 -08:00
Kumar Gala 6d83738e33 dts: spi: cleanup CONFIG_SPI_x_IRQ_PRI
All of the cases of CONFIG_SPI_x_IRQ_PRI should be DT_SPI_x_IRQ_PRI.
So go ahead and fix them up.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-21 12:27:16 -05:00
Kumar Gala 5f09eae7a1 kconfig: Hide the DesignWare SPI driver on unsupported platforms
When users are configuring applications they are given the option
to enable the DesignWare SPI driver. But they should not be given this
option on SoCs that don't have the DesignWare SPI HW.

This commit hides the driver by default by introducing the config
option HAS_SPI_DW.

Fixes: #10825

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-20 15:50:42 -05:00
Kumar Gala 1634cf2248 drivers/spi: Always selecet HAS_DTS_SPI once SPI is enabled
All drivers require DTS for their primary SPI settings.

Removing SPI_[0-9]_NAME config option added some more samples changes.
Usage of these options there was anyway not relevant.

Fixes #11064

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-16 14:02:00 -05:00
Kumar Gala fd6e9c6f58 dts: i2c: cleanup CONFIG_I2C_x_IRQ_PRI
The majority of cases of CONFIG_I2C_x_IRQ_PRI should be
DT_I2C_x_IRQ_PRI.  So go ahead and fix them up.  Only the i2c_nios
driver still uses Kconfig for getting priority.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-16 13:57:02 -05:00
Rajavardhan Gundi f75b5f6c55 intel_s1000: DTS: fix dts_fixup.h with new DT_ prefix for SPI driver
This fixes the SPI driver references in dts_fixup.h with DT_ prefixes.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-11-15 07:43:38 -05:00
Andy Ross 953a81a194 esp32: Enable an early-boot printk hook
The firmware starts us with an already-initialized UART and a simple
ROM hook.  Use that as the default printk handler so we can log in
very early boot.  It will be overriden later (as it happens, by
another handler based on the same firmware hooks).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-11-14 19:08:27 -05:00
Anas Nashif 14ba292870 xtensa: fix dts_fixup.h with new DT_ prefix
This fixes majority of drivers, however we still see build failures with
the interrupt handler.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-11-14 12:59:12 -05:00
Savinay Dharmappa cf58f83dd6 boards: xtensa: intel_s1000_crb: Enable SPI Master driver
patch enables SPI Master driver on intel_s1000_crb

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-11-13 18:49:03 -05:00
Ulf Magnusson 4638652214 Kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
This can help find unused symbols. Those end up without a type if
'default' is used instead of 'def_bool', which generates a warning.

Search for "Kconfig.defconfig" in
https://docs.zephyrproject.org/latest/application/kconfig-tips.html for
a longer explanation.

Keep the 'def_bool' for the following symbols, which seem to be
deliberately defined only in Kconfig.defconfig files:

 - ALTERA_AVALON_I2C
 - ALTERA_AVALON_MSGDMA
 - ALTERA_AVALON_PIO
 - ALTERA_AVALON_QSPI
 - ALTERA_AVALON_SYSID
 - CLOCK_CONTROL_IMX_CCM
 - CPU_EM4_DMIPS
 - CPU_EM4_FPUDA
 - CPU_EM4_FPUS
 - FP_FPU_DA
 - I2C_GECKO

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-11-13 16:04:01 -05:00
Andrzej Głąbek 20202902f2 dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig
These changes were obtained by running a script  created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:

1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
   #define X Y)
3. Check if that name is also the name of a Kconfig option
   3.a If it is, then do nothing
   3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
       has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
   (.c, .h, .ld)

Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.

Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Andrew Boie 506f15c381 interrupts: simplify position of sw ISR table
We now place the linker directives for the SW ISR table
in the common linker scripts, instead of repeating it
everywhere.

The table will be placed in RAM if dynamic interrupts are
enabled.

A dedicated section is used, as this data must not move
in between build phases.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-11-10 11:01:22 -05:00
Sathish Kuttan 3d19f891a3 soc: intel_s1000: GNA model - linker script entry
Add a linker script entry for embedding a GNA model at a
4KB page aligned address in .data section

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-08 17:08:19 -05:00
Sathish Kuttan c91faf9008 drivers: dmic: Intel PDM digital mic driver
Added an implementation of driver for Intel PDM digital microphone
controller .

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-08 00:40:28 -05:00
Savinay Dharmappa 79a790829f soc: xtensa: intel_s1000: fix fatal exception.
disable XTENSA_ASM2 Config to fix fatal exection
on intel_s1000.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-11-03 22:39:15 -04:00
Daniel Leung 2ce9d81a88 cmake: xcc: fix compile warnings and errors
XCC does not support the "-undef" flag so set NOSYSDEF_CFLAGS to
empty string to fix compile warning.

Also, XCC does not supply the macro __SIZEOF_LONG__ which breaks
the build. So define it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-11-01 16:30:02 -04:00
Kumar Gala 10976dda23 soc: Remove board.h include
The soc code doesn't need anything from board.h so lets remove the
include.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-01 13:15:18 +01:00
Leandro Pereira d3528cf001 soc: esp32: Update auto-generated _soc_inthandlers.h
Remove the auto-generated `handle_irq` label for the unneeded cases
to get rid of a compile warning.

Fixes #10801.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-10-27 21:25:57 -04:00
Sebastian Bøe b9c125f64c kconfig: Hide the DesignWare I2C driver on unsupported platforms
When users are configuring nRF applications they are given the option
to enable the DesignWare I2C driver. But they should not be given this
option because nRF SoCs do not have DesignWare I2C HW.

This commit hides the driver by default by introducing the config
option HAS_I2C_DW.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-10-25 07:32:05 +01:00
Leandro Pereira 7cea94942c soc: esp32: Use the smaller interrupt handling routines
Re-generate the ISR for ESP32, after modifying xtensa_intgen.py to
generate shorter code.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-10-22 13:38:29 -07:00
Daniel Leung c229126f55 xtensa: intel_s1000: turn on XTENSA_ASM2
This adds the necessary bits to support ASM2 with XCC
for Intel S1000 SoC. With ASM2 enabled, xcc is now
required to build for Intel S1000 SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 17:52:45 -04:00
Daniel Leung 6600c64331 linker: warn about orphan sections
(Previous patch set was reverted due to issue with priv_stack.
 Resubmitting after fixing the faults caused by priv_stack.noinit
 not at the end of RAM.)

This adds a linker flag and necessary changes to linker scripts
so that linker will warn about orphan sections.

Relates to #5534.

Fixes #10473, #10474, #10515.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 16:11:34 -04:00
Savinay Dharmappa 7b6776a36a drivers: wdt: Migrate esp32 wdt driver api to new wdt interface
patch migrates the esp32 wdt driver to new wdt interfaces

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-10-14 14:16:03 -04:00
Anas Nashif 0d4b5daeaa Revert "linker: warn about orphan sections"
This reverts commit 8ce758a8ff.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 12:14:04 -04:00
Rajavardhan Gundi 47bd922f70 xtensa: intel_s1000: Remove redundant call to soc_get_ref_clk_freq
Call to soc_get_ref_clk_freq function is redundant in soc.c as it
simply returns a global static variable. Hence removed that call.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-10-12 07:52:17 -04:00