Commit Graph

2021 Commits

Author SHA1 Message Date
Anas Nashif ed20fc9f30 doc: remove CONFIG_UART_QMSI_1_BAUDRATE from doc
This is now set by DTS.

Fixes #13752

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-03-03 13:09:48 -08:00
Ulf Magnusson 9fb4ec6a93 arduino_101_mcuboot: Remove CONFIG_UART_QMSI_0_BAUDRATE - moved to DTS
UART_QMSI_0_BAUDRATE was removed by commit 17c6456678 ("drivers/uart:
Use dts to set uart priorities for QMSI driver").

There's a reference to CONFIG_UART_QMSI_1_BAUDRATE as well, but getting
rid of it requires documentation updates.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-02 03:46:10 +01:00
Kumar Gala 096d2e3022 boards: rv32m1_vega: Have identifier match name
We expect that identifier in yaml will match board name for sanitycheck.
Change the identifier to match so sanitycheck runs propertly.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-03-01 09:51:07 +01:00
Ruth Fuchss 340fabedbf doc: boards: fix board target
Board target was changed but not updated in documentation.

Signed-off-by: Ruth Fuchss <ruth.fuchss@nordicsemi.no>
2019-02-28 18:19:03 +01:00
Daniel Leung ee50b49621 boards: up_squared: turn on PCI enumeration
The MMIO addresses for peripherals are being assigned by BIOS
at boot. Different BIOS versions and number of enabled peripherals
affect how those addresses are assigned. This invalidates
the addresses for UART defined in DTS. Turn on PCI enumeration
so UART addresses are probed at boot to avoid non-usable
UART and black console.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-28 18:13:43 +01:00
Kumar Gala 34a2630141 drivers: gpio: sx1509b: convert to DT_<COMPAT>_<INSTANCE> defines
Convert sx1509b sensor driver to use new defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-27 10:19:30 -06:00
Daniel Leung 603f068690 uart/ns16550: Use DT_ prefix for remaining device configs
Previous rename from CONFIG_* to DT_* left a few remaining
CONFIG_*. So rename them manually now.

Fix #13753

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 20:06:26 -06:00
Andrzej Głąbek cd65ed857c boards: nrf52810_pca10040: Override delay loop cycles
On nrf52810_pca10040 board, the nRF52810 SoC is emulated on nRF52832.
This patch overrides for this board the number of cycles consumed by
one iteration of the internal loop in `nrfx_coredep_delay_us()` (used
by `k_busy_wait()`), so that the value adequate for nRF52832 is used.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-02-26 11:53:20 -06:00
Andrzej Głąbek e2dd85472a soc: nrf52810: Allow the use of SPI0, TWI0, and UART0
In the recent MDK brought by nrfx 1.6.2, these legacy peripherals have
been revealed as available also in nRF52810. This patch allows their
use in Zephyr drivers.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-02-26 11:53:20 -06:00
Wayne Ren 951d96a3c3 arch: arc: fix the overkilled codes caused by removing APP_MEM
these codes are overkilled by commit 41f6011c

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-02-26 08:41:38 -08:00
Loic Poulain cf856183d1 soc: nxp_imx: mimxrt1064_evk: Enable ethernet support
The i.MX RT1064 evk has one ethernet (10/100M) connector via KSZ8081RNB
phy. Enable related dts nodes and config flags

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-02-26 08:04:40 -06:00
Anas Nashif 0f6b6fc675 doc: update xcc installation instructions
Update instructions to match latest SDK and avoid installation in system
folders using sudo.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-26 02:58:07 +01:00
Daniel Leung 818050048a boards/intel_s1000_crb: fix image creation with custom filename
The command to create the board image binary file assumes the input
is always called zephyr.bin. This is not always the case if custom
name is defined in CONFIG_KERNEL_BIN_NAME. So update the call of
command to use CONFIG_KERNEL_BIN_NAME.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-26 01:44:59 +01:00
Piotr Zięcik d30c9aeafd drivers: nrf_power_clock: Migrate to DTS.
This commit migrates the nrf_power_clock driver to DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-02-25 17:51:24 +01:00
Tavish Naruka df500c164c boards: arm: add Electronut labs papyr (nrf52840_papyr)
Added config for https://docs.electronut.in/papyr/

Signed-off-by: Tavish Naruka <tavishnaruka@gmail.com>
2019-02-25 13:01:46 +01:00
Charles E. Youse d3adba8379 boards/x86: scripts: build_grub.sh fix for newer GCC versions
Recent versions of GCC won't build grub-2.02 because they're more
pedantic about warnings. This has been fixed upstream but is not
yet part of any release. The build script is modified to apply the
relevant commits before building.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-22 12:20:07 -06:00
Piotr Zierhoffer 8e0fcbfd7e m2gl025_miv: Set performance in Renode script.
This fix allows Renode to resemble the time flow of the hardware more
precisely. The performance value was established manually, there is no
indication in the docs on what is the average performance.

It allows tests/posix/common/portability.posix to pass, but fails on
tests/kernel/lifo/lifo_usage/kernel.lifo.usage.

The latter also fails on hardware.

Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
2019-02-22 11:53:59 -06:00
Anas Nashif fbe15ca7ab boards: udoo_neo_full_m4: not a default testing platform
This should not be run as a default platform in sanitycheck.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-22 11:07:25 -06:00
Ioannis Glaropoulos 0122bacd2c boards: arm: nrf: explicitly set Load size for strictly Secure builds
This commit adds a patch in the Kconfig.defconfig file of
nRF9160_pca10090 board, that instructs the linker to restrict
the Secure image to the size of its code partition, if the
image is to be combined with a Non-Secure image. Secure images
without accompanying Non-Secure firmware (i.e. with symbol
TRUSTED_EXECUTION_SECURE not set) can use the entire flash.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-22 08:57:23 -06:00
Ioannis Glaropoulos 8506e8f912 boards: arm: nrf: do not overwrite flash0 reg property in nRF91 board
We do not need to overwrite the reg property of flash0
in nrf9160_pca10090 default partitioning. The property
reflects the flash resources of the SOC, and is passed
in the .dtsi file of nRF9160 SOC definition.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-22 08:57:23 -06:00
Michael Scott 7f4eb00f47 boards: 96b_nitrogen: standardize scratch and storage partitions
Most of the other nRF52832 boards have the following settings for
scratch and storage partitions:

scratch_partition: partition@70000 {
        label = "image-scratch";
        reg = <0x00070000 0xa000>;
};

storage_partition: partition@7a000 {
        label = "storage";
        reg = <0x0007a000 0x00006000>;
};

Let's adjust the scratch size to align with the others and add the
storage partition so that settings and FS samples will work.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-02-22 08:46:13 -05:00
Kumar Gala ee3f7d629b boards: arm: mimxrt10*_evk: Enable MPU
The MPU should have been enabled on all these boards since they have
Cortex-M7 and need mpu for caching support.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-21 15:37:01 -06:00
Michael Scott 1350de9a00 boards: nrf52_blenano2: standardize scratch and storage partitions
Most of the other nRF52832 boards have the following settings for
scratch and storage partitions:

scratch_partition: partition@70000 {
	label = "image-scratch";
	reg = <0x00070000 0xa000>;
};

storage_partition: partition@7a000 {
	label = "storage";
	reg = <0x0007a000 0x00006000>;
};

Let's remove the snowflake settings in BLENano2 which coincidentally
are incorrect: storage overruns the flash area by 0x1000 and causes
a crash when enabling FCB storage.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-02-21 11:54:35 +01:00
Carles Cufi 997ef85ea9 doc: Clean up build instructions and use of variables
Remove most unnecessary instances of `export` and `cmake` use that can
instead be replaced with `zephyr-app-commands` or similar. This is to
avoid documentation using different mechanisms to describe the same
actions and in preparation for documenting `west build` everywhere.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-02-21 11:46:45 +01:00
Alberto Escolar Piedras 80c9a6acea doc: Add more coverage documentation
Add more documentation about how to generate coverage reports
for POSIX arch based boards

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-02-20 18:05:09 -05:00
Maureen Helm d5351d8c3d boards: rv32m1_vega: Fix red and blue led labels
The red and blue led labels were swapped on the rv32m1_vega board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-20 16:57:45 -06:00
Sathish Kuttan 3061fb7db2 Kconfig: intel_s1000: Remove DCACHE_WRITEBACK
Remove DCACHE_WRITEBACK Kconfig variable definition in Intel S1000
DMA driver. Remove the variable from default configuration as well.

Cache configuration is fixed and the cache operation routines
internally take appropriate action based on the cache configuration.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-20 07:33:11 -05:00
Jukka Rissanen 41d17433f0 doc: net: Add more info for network connectivity with host
Added more detailed information how to connect Zephyr instance
to host system like Linux desktop.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-02-20 07:32:42 -05:00
Anas Nashif 138f485c1e intel_s1000_crb: do not enable USB by default
Make USB configurable and set defaults in Kconfig.defconfig.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-20 07:27:39 -05:00
David B. Kinder 882702e688 doc: fix misspellings in docs
Fix misspelling in boards, samples, and doc missed during regular
reviews.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-02-19 21:35:45 -05:00
Maureen Helm 9063c95f3a boards: mimxrt1060_evk: Add hwinfo to the supported list
The mimxrt1060_evk was missing hwinfo in the supported list. All other
imx rt boards already have it.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-19 17:10:31 -06:00
Maureen Helm d9a3fe65ef boards: Add hwinfo to supported list for kinetis boards
All in-tree kinetis boards select HAS_MCUX_SIM and can use the
same kinetis hwinfo driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-19 17:10:31 -06:00
Maureen Helm 20828d5b3a boards: Fix Segger RTT on hexiwear_kw40z and usb_kw24d512 boards
Fixes Segger RTT on the hexiwear_kw40z and usb_kw24d512 boards by
setting CONFIG_RTT_CONSOLE=y and CONFIG_USE_SEGGER_RTT=y.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-19 17:10:31 -06:00
Kumar Gala 1f79491ecf boards: x86_64: qemu_x86_64: Remove board.h
board.h shouldn't be needed and the file has no contents.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-19 08:29:28 -06:00
Erwan Gouriou 910b8b32fc boards: nucleo_f334r8: Provide flash storage partition
Add 6kb storage partition and declare nvs is supported.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Erwan Gouriou b3252a8a71 boards: stm32f3_disco: Add a storage partition
Add a 6kb "storage" partition to enable nvs samples test.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Erwan Gouriou f0cac35a58 boards: nucleo_l432kc: Fix comment on partition description
Comment for storage partition could be misleading.
Clarify this is a partition used for file system.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Erwan Gouriou 5629f61b40 boards: nucleo_f091rc: Increase storage partition size
Storage partition minimum size is 6kb for successful test of
nvs sample.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Kumar Gala 8bd360fa14 boards: galileo: Fix I2C device name defaults
Fix setting of the I2C bus master device name for the GPIO_PCAL9535A
device and PWM_PCA9685.  We need to extract them from the dts otherwise
they will just get set to "".

Fixes #13458

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-18 23:39:12 -05:00
Maureen Helm cf94d6811a soc: nxp_imx: Default to on-chip memories at soc level
Refactor the imx rt code/data location config defaults such that we
default to on-chip memories at the soc level and override to external
memories at the board level. This means that we frequently override soc
defaults for evk boards, but it removes the assumption that all imx rt
boards (particularly non-evk boards) will have the same external
memories as evk boards.

The end result is that imx rt evk boards still have the same defaults as
before, but the way we get there is different.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-18 15:14:18 -05:00
Johann Fischer 853710993d boards: reel_board: remove cts,rts pins from uart node
Remove cts,rts pins from uart node.
The pins are used for expansion connector.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-02-18 15:08:22 -05:00
Johann Fischer b5b728495b boards: reel_board: enable pull-up on UART RX pin
Enable pull-up on UART RX pin to reduce power consumption.
If the board is powered by battery and the debugger is
not connected via USB to the host, the SoC consumes up
to 2mA more than expected.
The consumption increases because RX pin is floating
(High-Impedance state of pin B from Dual-Supply Bus Transceiver).

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-02-18 15:08:22 -05:00
Carlos Stuart 75f77db432 include: misc: util.h: Rename min/max to MIN/MAX
There are issues using lowercase min and max macros when compiling a C++
application with a third-party toolchain such as GNU ARM Embedded when
using some STL headers i.e. <chrono>.

This is because there are actual C++ functions called min and max
defined in some of the STL headers and these macros interfere with them.
By changing the macros to UPPERCASE, which is consistent with almost all
other pre-processor macros this naming conflict is avoided.

All files that use these macros have been updated.

Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
2019-02-14 22:16:03 -05:00
Daniel Leung 1d55411a96 boards/intel_s1000_crb: fix Python string format
Fix the support script to actually use Python string formatting,
instead of C-style printf().

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-14 19:51:45 -05:00
Andrzej Głąbek 41e09725bb boards: nrf: Enable HW PWMs on nrf52832_mdk and nrf52840_mdk
This is a follow-up to commit e2b38e02bf.
Default PWM instances are enabled in Kconfig and DTS (with channel 0
set to LED0 pin) for these boards so that it is possible to build basic
samples blink_led and fade_led for them without extra modifications.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-02-14 18:50:00 -06:00
Alberto Escolar Piedras 143552550f tracing: Add missing isr_exit() for posix arch boards
For the native_posix board, and for the nrf52_bsim boards,
the sys_trace_irs_exit() call was missing. Add it.

Relates to #13357

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-02-14 15:41:19 -05:00
Erwan Gouriou 516899c82b boards: nucleo_l4r5zi: Add flash & debug support
Following introduction of zephyr sdk0.10 and openocd branch
from from 20190130, stm32l4+ SoC support is now available and
flash and debug operations are available on nucleo_l4r5zi board.

Fixes 12094

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-13 22:05:49 -06:00
Maureen Helm 0540b1a699 soc: nxp_imx: Move code/data location configs to soc level
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:

warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice

The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.

The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-13 17:52:20 -05:00
Ryan Erickson 847500dd43 boards: bl654_dvk: Add BL654 DVK board
Add the Laird Connectivity BL654 DVK board to zephyr.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdtech.com>
2019-02-13 11:02:56 -06:00
Ryan Erickson 21b4f77b1c boards: bl652_dvk: Add BL652 DVK board
Add the Laird Connectivity BL652 DVK board to zephyr.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdtech.com>
2019-02-12 21:16:26 -05:00